Signed-off-by: Stefan Roese <s...@denx.de>
---
board/amcc/sequoia/sdram.c | 6 +-----
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index c26e6ee..6df4c6d 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -44,7 +44,7 @@ extern void denali_core_search_data_eye(void);
* for the 4k NAND boot image so define bus_frequency to 133MHz here
* which is save for the refresh counter setup.
*/
-#define get_bus_freq(val) 133000000
+#define get_bus_freq(val) 133333333
#endif
/*************************************************************************
@@ -55,11 +55,7 @@ extern void denali_core_search_data_eye(void);
phys_size_t initdram (int board_type)
{
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
-#if !defined(CONFIG_NAND_SPL)
ulong speed = get_bus_freq(0);
-#else
- ulong speed = 133333333; /* 133MHz is on the safe side */
-#endif
mtsdram(DDR0_02, 0x00000000);
--
1.6.2.3
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