[U-Boot] [PATCH] drivers:power:exynos-tmu: add support for Exynos5260

[Naveen Krishna Chatradhi]

This patch adds support for TMU on Exynos5260
Register bit fields are little different from the previous
versions.

Change-Id: Ibe835abe9cb255d2f8375c8e9e32d32cff19c093
Signed-off-by: Naveen Krishna Chatradhi <ch.nav...@samsung.com>
---
 arch/arm/include/asm/arch-exynos/tmu.h |   11 +++++++++++
 drivers/power/exynos-tmu.c             |   25 +++++++++++++++++++++++--
 2 files changed, 34 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/tmu.h 
b/arch/arm/include/asm/arch-exynos/tmu.h
index cad3569..19b8f62 100644
--- a/arch/arm/include/asm/arch-exynos/tmu.h
+++ b/arch/arm/include/asm/arch-exynos/tmu.h
@@ -26,7 +26,11 @@ struct exynos5_tmu_reg {
        u32 triminfo_control;
        u32 rsvd5[2];
        u32 tmu_control;
+#ifdef CONFIG_EXYNOS5260
+       u32 tmu_control1;
+#else
        u32 rsvd7;
+#endif
        u32 tmu_status;
        u32 sampling_internal;
        u32 counter_value0;
@@ -41,10 +45,17 @@ struct exynos5_tmu_reg {
        u32 past_temp7_4;
        u32 past_temp11_8;
        u32 past_temp15_12;
+#ifdef CONFIG_EXYNOS5260
+       u32 rsvd15[16];
+#endif
        u32 inten;
        u32 intstat;
        u32 intclear;
+#ifdef CONFIG_EXYNOS5260
+       u32 rsvd31[17];
+#else
        u32 rsvd15;
+#endif
        u32 emul_con;
 };
 #endif /* __ASM_ARCH_TMU_H */
diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c
index 9a093a5..de3ff82 100644
--- a/drivers/power/exynos-tmu.c
+++ b/drivers/power/exynos-tmu.c
@@ -31,7 +31,13 @@
 #define INTEN_RISE0            1
 #define INTEN_RISE1            (1 << 4)
 #define INTEN_RISE2            (1 << 8)
+
+#ifdef CONFIG_EXYNOS5250
+#define INTEN_FALL0            (1 << 12)
+#else
 #define INTEN_FALL0            (1 << 16)
+#endif
+
 #define INTEN_FALL1            (1 << 20)
 #define INTEN_FALL2            (1 << 24)
 
@@ -43,9 +49,24 @@
 #define INTCLEAR_FALL0         (1 << 16)
 #define INTCLEAR_FALL1         (1 << 20)
 #define INTCLEAR_FALL2         (1 << 24)
+
+#ifdef CONFIG_EXYNOS5260
+#define INTEN_RISE3            (1 << 12)
+#define INTEN_FALL3            (1 << 28)
+#define INTCLEAR_RISE3         (1 << 12)
+#define INTCLEAR_FALL3         (1 << 28)
+#endif
+
+#if defined(INTCLEAR_RISE3) && defined(INTCLEAR_FALL3)
 #define INTCLEARALL            (INTCLEAR_RISE0 | INTCLEAR_RISE1 | \
-                                INTCLEAR_RISE2 | INTCLEAR_FALL0 | \
-                                INTCLEAR_FALL1 | INTCLEAR_FALL2)
+                               INTCLEAR_RISE2 | INTCLEAR_RISE3 | \
+                               INTCLEAR_FALL0 | INTCLEAR_FALL1 | \
+                               INTCLEAR_FALL2 | INTCLEAR_FALL3)
+#else
+#define INTCLEARALL            (INTCLEAR_RISE0 | INTCLEAR_RISE1 | \
+                               INTCLEAR_RISE2 | INTCLEAR_FALL0 | \
+                               INTCLEAR_FALL1 | INTCLEAR_FALL2)
+#endif
 
 /* Tmeperature threshold values for various thermal events */
 struct temperature_params {
-- 
1.7.10.4

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