Detlev-san, Detlev Zundel wrote: > Instead of special casing the different access patterns, use common > code with light macros sprinkled in to accomodate for the different > layouts of the register structure. > > Note that this also changes the types of the registers for the > "positively packed (>1)" cases. As the registers truly are unsigned > chars, this is surely the Right Thing, but it is a semantic change. > Note that for this case depending on the endianness on the bus, we may > see a change of behaviour. > > Signed-off-by: Detlev Zundel <d...@denx.de> > --- > include/ns16550.h | 130 > +++++++++++++++-------------------------------------- > 1 files changed, 37 insertions(+), 93 deletions(-) > > > Note, that I checked that the offsets are ok in the used cases > switching from the old to the new code. They *do* shift however in > the positive packed cases, because the old code uses data types > different than unsigned char. Note that doing this, I also noticed > that using "unsigned long" for 4 byte registers is also no longer true > on 64-bit architectures. One more reason to change the code. > > Apart from that the code was also compile tested on several > configurations using different REG_SIZES and compiles without > warnings. The special interesting case of +4 was successfully tested > on CU824.
My hardware required 32-bit word access to NS16550 registers due to byte-enable-lane reason (note that it's different from endian-ness). I mean, struct NS16550 { unsigned char rbr; unsigned char postpad_rbr[15]; : : }; if different from struct NS16550 { unsigned long rbr; unsigned long postpad_rbr[3]; : : }; , at least for my hardware. How do I supposed to configure UART in my board config file? Shinya _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot