On Tue, Jan 7, 2014 at 7:13 AM, Nobuhiro Iwamatsu <nobuhiro.iwamatsu...@renesas.com> wrote: > This adds base register address of SH QSPI. > Currently, SH QSPI is used only from R8A7790 and R8A7791. > > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu...@renesas.com> > --- > drivers/spi/sh_qspi.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c > index edeb42d..b38d76c 100644 > --- a/drivers/spi/sh_qspi.c > +++ b/drivers/spi/sh_qspi.c > @@ -12,6 +12,13 @@ > #include <spi.h> > #include <asm/io.h> > > +/* SPI base register */ > +#if defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) > +#define CONFIG_SH_QSPI_BASE 0xE6B10000 I think it's good to define this on .h file in arch/*/include/* then the same header will include here. - fine for rest of peripherals too.
> +#else > +#error "SH QSPI does not support your CPU." > +#endif > + > /* SH QSPI register bit masks <REG>_<BIT> */ > #define SPCR_MSTR 0x08 > #define SPCR_SPE 0x40 > -- > 1.8.5 > -- Thanks, Jagan. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot