This patch adds common board file for Exynos 4 based boards.

Signed-off-by: Piotr Wilczek <p.wilc...@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.p...@samsung.com>
---
 arch/arm/dts/exynos4.dtsi            |  139 +++++++++++++++++++++++++++
 board/samsung/common/Makefile        |    1 +
 board/samsung/common/board_exynos4.c |   83 +++++++++++++++++
 include/configs/exynos4-dt.h         |  170 ++++++++++++++++++++++++++++++++++
 4 files changed, 393 insertions(+)
 create mode 100644 arch/arm/dts/exynos4.dtsi
 create mode 100644 board/samsung/common/board_exynos4.c
 create mode 100644 include/configs/exynos4-dt.h

diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
new file mode 100644
index 0000000..38a6919
--- /dev/null
+++ b/arch/arm/dts/exynos4.dtsi
@@ -0,0 +1,139 @@
+/*
+ * Samsung's Exynos4 SoC common device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+
+       serial@13800000 {
+               compatible = "samsung,exynos4210-uart";
+               reg = <0x13800000 0x3c>;
+               id = <0>;
+       };
+
+       serial@13810000 {
+               compatible = "samsung,exynos4210-uart";
+               reg = <0x13810000 0x3c>;
+               id = <1>;
+       };
+
+       serial@13820000 {
+               compatible = "samsung,exynos4210-uart";
+               reg = <0x13820000 0x3c>;
+               id = <2>;
+       };
+
+       serial@13830000 {
+               compatible = "samsung,exynos4210-uart";
+               reg = <0x13830000 0x3c>;
+               id = <3>;
+       };
+
+       serial@13840000 {
+               compatible = "samsung,exynos4210-uart";
+               reg = <0x13840000 0x3c>;
+               id = <4>;
+       };
+
+       i2c@13860000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <0 0 0>;
+       };
+
+       i2c@13870000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <1 1 0>;
+       };
+
+       i2c@13880000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <2 2 0>;
+       };
+
+       i2c@13890000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <3 3 0>;
+       };
+
+       i2c@138a0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <4 4 0>;
+       };
+
+       i2c@138b0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <5 5 0>;
+       };
+
+       i2c@138c0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <6 6 0>;
+       };
+
+       i2c@138d0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,s3c2440-i2c";
+               interrupts = <7 7 0>;
+       };
+
+       sdhci@12510000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos-mmc";
+               reg = <0x12510000 0x1000>;
+               interrupts = <0 75 0>;
+       };
+
+       sdhci@12520000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos-mmc";
+               reg = <0x12520000 0x1000>;
+               interrupts = <0 76 0>;
+       };
+
+       sdhci@12530000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos-mmc";
+               reg = <0x12530000 0x1000>;
+               interrupts = <0 77 0>;
+       };
+
+       sdhci@12540000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos-mmc";
+               reg = <0x12540000 0x1000>;
+               interrupts = <0 78 0>;
+       };
+
+       gpio: gpio {
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+};
diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile
index 7d2bb8c..25f1e40 100644
--- a/board/samsung/common/Makefile
+++ b/board/samsung/common/Makefile
@@ -12,4 +12,5 @@ obj-$(CONFIG_MISC_COMMON) += misc.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_BOARD_COMMON)     += board.o
+obj-$(CONFIG_BOARD_COMMON_EXYNOS4)     += board_exynos4.o
 endif
diff --git a/board/samsung/common/board_exynos4.c 
b/board/samsung/common/board_exynos4.c
new file mode 100644
index 0000000..2d313e6
--- /dev/null
+++ b/board/samsung/common/board_exynos4.c
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2014 SAMSUNG Electronics
+ * Piotr Wilczek <p.wilc...@samsung.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <asm/io.h>
+#include <asm/arch/board.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+#include <power/pmic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+       int i;
+       u32 addr;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+               gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+       }
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       int i;
+       u32 addr, size;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+               size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+               gd->bd->bi_dram[i].start = addr;
+               gd->bd->bi_dram[i].size = size;
+       }
+}
+
+int board_init(void)
+{
+#ifdef CONFIG_SYS_SPL_ARGS_ADDR
+       gd->bd->bi_boot_params = CONFIG_SYS_SPL_ARGS_ADDR;
+#else
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+#endif
+
+       return exynos_init();
+}
+
+#ifdef CONFIG_OF_CONTROL
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+       int ret;
+
+       /* mmc initializattion for available channels */
+       ret = exynos_mmc_init(gd->fdt_blob);
+       if (ret)
+               debug("mmc init failed\n");
+
+       return ret;
+}
+#endif
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+       const char *board_name;
+
+       board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
+       printf("Board: %s\n", board_name ? board_name : "Unknown board");
+
+       return 0;
+}
+#endif
+#endif
diff --git a/include/configs/exynos4-dt.h b/include/configs/exynos4-dt.h
new file mode 100644
index 0000000..aa941f3
--- /dev/null
+++ b/include/configs/exynos4-dt.h
@@ -0,0 +1,170 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5 board.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG                 /* in a SAMSUNG core */
+#define CONFIG_S5P                     /* S5P Family */
+#define CONFIG_EXYNOS4                 /* which is in a Exynos5 Family */
+#define CONFIG_TIZEN                   /* TIZEN lib */
+
+#include <asm/arch/cpu.h>              /* get chip and board defs */
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_COMMON_EXYNOS4
+
+/* Enable fdt support */
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_EMBED
+
+#define CONFIG_SYS_CACHELINE_SIZE      32
+
+/* input clock of PLL: EXYNOS4 boards have 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ            24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+#include <asm/sizes.h>
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (80 * SZ_1M))
+
+/* select serial console configuration */
+#define CONFIG_SERIAL2
+#define CONFIG_BAUDRATE                        115200
+
+/* Console configuration */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_S5P_SDHCI
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
+#define CONFIG_MMC_DEFAULT_DEV 0
+
+/* PWM */
+#define CONFIG_PWM
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_XIMG
+#undef CONFIG_CMD_CACHE
+#undef CONFIG_CMD_ONENAND
+#undef CONFIG_CMD_MTDPARTS
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
+#define CONFIG_CMD_PMIC
+#define CONFIG_CMD_SETEXPR
+
+#define CONFIG_BOOTDELAY               3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* EXT4 */
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+
+/* TIZEN THOR downloader support */
+#define CONFIG_CMD_THOR_DOWNLOAD
+#define CONFIG_THOR_FUNCTION
+
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
+#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
+#define CONFIG_G_DNL_MANUFACTURER "Samsung"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP            /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER         /* use "hush" command parser    */
+#define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE              384     /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS             16      /* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
+
+#define CONFIG_BOOTARGS                        "Please use defined boot"
+#define CONFIG_BOOTCOMMAND             "run mmcboot"
+#define CONFIG_DEFAULT_CONSOLE         "console=ttySAC1,115200n8\0"
+
+#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_LOAD_ADDR \
+                                       - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MEM_TOP_HIDE        (1 << 20)       /* ram console */
+
+#define CONFIG_SYS_MONITOR_BASE        0x00000000
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         CONFIG_MMC_DEFAULT_DEV
+#define CONFIG_ENV_SIZE                        4096
+#define CONFIG_ENV_OFFSET              ((32 - 4) << 10) /* 32KiB - 4KiB */
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW    2
+#define CONFIG_USB_CABLE_CHECK
+
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_GADGET_MASS_STORAGE
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+
+/* Enable Time Command */
+#define CONFIG_CMD_TIME
+
+#define CONFIG_CMD_BOOTZ
+
+#endif /* __CONFIG_H */
-- 
1.7.9.5

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