Dear Mischa,
In message
<e6bf041e97966e4db955f0df883ad2d685f40...@de02wembxa.internal.synopsys.com> you
wrote:
> > > +void icache_enable(void)
> > > +{
> > > + write_aux_reg(ARC_REG_IC_CTRL, read_aux_reg(ARC_REG_IC_CTRL) &
> > > + ~IC_CTRL_CACHE_DISABLE);
> > > +}
> >
> >
> > I missed this in patch # 1 - why do you need these read_aux_reg() /
> > write_aux_reg() macros? Why cannot you use standard I/O accessors instead?
>
> Auxiliary registers are not I/O registers. The ARC architecture has general
> purpose registers (like any processor core has), and another set of
> registers, the auxiliary registers. These require a specific assembly
> instruction to be accessed.
Thanks for the explanation. And sorry for my ignorance - I don't know
ARC at all...
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
: 1. What is the possibility of this being added in the future?
In the near future, the probability is close to zero. In the distant
future, I'll be dead, and posterity can do whatever they like... :-)
- lwall
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