This patch adds support for displaying CPU type information
about Atmel AT91 cores during boot. It currently only configures it for the
at91sam9261ek board, but it can easily be configured for all at91 based cores.
This patch also provides at91_dbgu.h which is also used by the upcoming
USB CDC-ethernet and USB-gadget support for this board.
Signed-off-by: Remy Böhmer <li...@bohmer.net>
---
cpu/arm926ejs/at91/Makefile | 1
cpu/arm926ejs/at91/cpuinfo.c | 83 ++++++++++++++++++++++++++++
include/asm-arm/arch-at91/at91_dbgu.h | 69 +++++++++++++++++++++++
include/asm-arm/arch-at91/cpu.h | 99 ++++++++++++++++++++++++++++++++++
include/configs/at91sam9261ek.h | 2
5 files changed, 254 insertions(+)
create mode 100644 cpu/arm926ejs/at91/cpuinfo.c
create mode 100644 include/asm-arm/arch-at91/at91_dbgu.h
create mode 100644 include/asm-arm/arch-at91/cpu.h
Index: u-boot-usb.tmp/cpu/arm926ejs/at91/Makefile
===================================================================
--- u-boot-usb.tmp.orig/cpu/arm926ejs/at91/Makefile 2009-05-02
21:43:41.000000000 +0200
+++ u-boot-usb.tmp/cpu/arm926ejs/at91/Makefile 2009-05-02 22:01:46.000000000
+0200
@@ -55,6 +55,7 @@ COBJS-y += at91sam9rl_serial.o
COBJS-$(CONFIG_HAS_DATAFLASH) += at91sam9rl_spi.o
endif
COBJS-$(CONFIG_AT91_LED) += led.o
+COBJS-$(CONFIG_DISPLAY_CPUINFO) +=cpuinfo.o
COBJS-y += clock.o
COBJS-y += cpu.o
COBJS-y += timer.o
Index: u-boot-usb.tmp/cpu/arm926ejs/at91/cpuinfo.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-usb.tmp/cpu/arm926ejs/at91/cpuinfo.c 2009-05-02 22:01:46.000000000
+0200
@@ -0,0 +1,83 @@
+#include <command.h>
+#include <common.h>
+#include <arm926ejs.h>
+#include <asm/hardware.h>
+#include <asm/arch/at91_dbgu.h>
+#include <asm/arch/io.h>
+
+int print_cpuinfo(void)
+{
+ unsigned long cidr;
+ const char *txt;
+
+ cidr = at91_sys_read(AT91_DBGU_CIDR);
+
+ switch ((cidr & AT91_CIDR_EPROC) >> 5) {
+ case 0x1: txt = "ARM946ES"; break;
+ case 0x2: txt = "ARM7TDMI"; break;
+ case 0x4: txt = "ARM920T"; break;
+ case 0x5: txt = "ARM926EJS"; break;
+ default: txt = "undefined"; break;
+ }
+ printf("Embedded Processor: %s\n", txt);
+
+ switch ((cidr & AT91_CIDR_ARCH) >> 20) {
+ case 0x19: txt = "AT91SAM9xx"; break;
+ case 0x29: txt = "AT91SAM9XExx"; break;
+ case 0x34: txt = "AT91x34"; break;
+ case 0x37: txt = "CAP7"; break;
+ case 0x39: txt = "CAP9"; break;
+ case 0x3B: txt = "CAP11"; break;
+ case 0x40: txt = "AT91x40"; break;
+ case 0x42: txt = "AT91x42"; break;
+ case 0x55: txt = "AT91x55"; break;
+ case 0x60: txt = "AT91SAM7Axx"; break;
+ case 0x61: txt = "AT91SAM7AQxx"; break;
+ case 0x63: txt = "AT91x63"; break;
+ case 0x70: txt = "AT91SAM7Sxx"; break;
+ case 0x71: txt = "AT91SAM7XCxx"; break;
+ case 0x72: txt = "AT91SAM7SExx"; break;
+ case 0x73: txt = "AT91SAM7Lxx"; break;
+ case 0x75: txt = "AT91SAM7Xxx"; break;
+ case 0x92: txt = "AT91x92"; break;
+ case 0xF0: txt = "AT75Cxx"; break;
+ default: txt = "undefined"; break;
+ }
+ printf("Architecture: %s Series\n", txt);
+
+ printf("CPU-revision: %c\n", (char)('A' + (cidr & AT91_CIDR_VERSION)));
+
+ switch ((cidr & AT91_CIDR_NVPTYP) >> 28) {
+ case 0x0: txt = "ROM"; break;
+ case 0x1: txt = "ROMless or onchip flash"; break;
+ case 0x2: txt = "Embedded flash memory"; break;
+ case 0x3: txt = "ROM and Embedded flash memory"; break;
+ case 0x4: txt = "SRAM emulating ROM"; break;
+ default: txt = "undefined"; break;
+ }
+ printf("NonVolatile Program Memory type: %s\n", txt);
+
+ switch (cidr & AT91_CIDR_SRAMSIZ) {
+ case AT91_CIDR_SRAMSIZ_1K: txt = "1K"; break;
+ case AT91_CIDR_SRAMSIZ_2K: txt = "2K"; break;
+ case AT91_CIDR_SRAMSIZ_112K: txt = "112K"; break;
+ case AT91_CIDR_SRAMSIZ_4K: txt = "4K"; break;
+ case AT91_CIDR_SRAMSIZ_80K: txt = "80K"; break;
+ case AT91_CIDR_SRAMSIZ_160K: txt = "160K"; break;
+ case AT91_CIDR_SRAMSIZ_8K: txt = "8K"; break;
+ case AT91_CIDR_SRAMSIZ_16K: txt = "16K"; break;
+ case AT91_CIDR_SRAMSIZ_32K: txt = "32K"; break;
+ case AT91_CIDR_SRAMSIZ_64K: txt = "64K"; break;
+ case AT91_CIDR_SRAMSIZ_128K: txt = "128K"; break;
+ case AT91_CIDR_SRAMSIZ_256K: txt = "256K"; break;
+ case AT91_CIDR_SRAMSIZ_96K: txt = "96K"; break;
+ case AT91_CIDR_SRAMSIZ_512K: txt = "512K"; break;
+ default: txt = "undefined"; break;
+ }
+ printf("Internal SRAM size: %s\n", txt);
+
+ if (cidr & AT91_CIDR_EXT)
+ printf("Extension ID: 0x%x\n", at91_sys_read(AT91_DBGU_EXID));
+
+ return 0;
+}
Index: u-boot-usb.tmp/include/asm-arm/arch-at91/at91_dbgu.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-usb.tmp/include/asm-arm/arch-at91/at91_dbgu.h 2009-05-02
22:01:46.000000000 +0200
@@ -0,0 +1,69 @@
+/*
+ * include/asm-arm/arch-at91/at91_dbgu.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Debug Unit (DBGU) - System peripherals registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_DBGU_H
+#define AT91_DBGU_H
+
+#ifdef AT91_DBGU
+#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
+#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
+#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable */
+#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready
*/
+#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty
*/
+#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable */
+#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask */
+#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */
+#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding */
+#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding */
+#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator */
+
+#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
+#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension */
+#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST [SAM9 only] */
+#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
+
+#endif /* AT91_DBGU */
+
+/*
+ * Some AT91 parts that don't have full DEBUG units still support the ID
+ * and extensions register.
+ */
+#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the
Device */
+#define AT91_CIDR_EPROC (7 << 5) /* Embedded
Processor */
+#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile
Program
+ Memory Size */
+#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second
Nonvolatile
+ Program Memory Size */
+#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal
SRAM Size */
+#define AT91_CIDR_SRAMSIZ_1K (1 << 16)
+#define AT91_CIDR_SRAMSIZ_2K (2 << 16)
+#define AT91_CIDR_SRAMSIZ_112K (4 << 16)
+#define AT91_CIDR_SRAMSIZ_4K (5 << 16)
+#define AT91_CIDR_SRAMSIZ_80K (6 << 16)
+#define AT91_CIDR_SRAMSIZ_160K (7 << 16)
+#define AT91_CIDR_SRAMSIZ_8K (8 << 16)
+#define AT91_CIDR_SRAMSIZ_16K (9 << 16)
+#define AT91_CIDR_SRAMSIZ_32K (10 << 16)
+#define AT91_CIDR_SRAMSIZ_64K (11 << 16)
+#define AT91_CIDR_SRAMSIZ_128K (12 << 16)
+#define AT91_CIDR_SRAMSIZ_256K (13 << 16)
+#define AT91_CIDR_SRAMSIZ_96K (14 << 16)
+#define AT91_CIDR_SRAMSIZ_512K (15 << 16)
+#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Id
*/
+#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile
Program
+ Memory Type */
+#define AT91_CIDR_EXT (1 << 31) /* Extension
Flag */
+
+#endif
Index: u-boot-usb.tmp/include/asm-arm/arch-at91/cpu.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ u-boot-usb.tmp/include/asm-arm/arch-at91/cpu.h 2009-05-02
22:01:46.000000000 +0200
@@ -0,0 +1,99 @@
+/*
+ * include/asm-arm/arch-at91/cpu.h
+ *
+ * Copyright (C) 2006 SAN People
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_CPU_H
+#define __ASM_ARCH_CPU_H
+
+#include <asm/hardware.h>
+#include <asm/arch/at91_dbgu.h>
+#include <asm/arch/io.h>
+
+
+#define ARCH_ID_AT91RM9200 0x09290780
+#define ARCH_ID_AT91SAM9260 0x019803a0
+#define ARCH_ID_AT91SAM9261 0x019703a0
+#define ARCH_ID_AT91SAM9263 0x019607a0
+#define ARCH_ID_AT91SAM9RL64 0x019b03a0
+#define ARCH_ID_AT91CAP9 0x039A03A0
+
+#define ARCH_ID_AT91SAM9XE128 0x329973a0
+#define ARCH_ID_AT91SAM9XE256 0x329a93a0
+#define ARCH_ID_AT91SAM9XE512 0x329aa3a0
+
+#define ARCH_ID_AT91M40800 0x14080044
+#define ARCH_ID_AT91R40807 0x44080746
+#define ARCH_ID_AT91M40807 0x14080745
+#define ARCH_ID_AT91R40008 0x44000840
+
+static inline unsigned long at91_cpu_identify(void)
+{
+ return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
+}
+
+
+#define ARCH_FAMILY_AT91X92 0x09200000
+#define ARCH_FAMILY_AT91SAM9 0x01900000
+#define ARCH_FAMILY_AT91SAM9XE 0x02900000
+
+static inline unsigned long at91_arch_identify(void)
+{
+ return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
+}
+
+
+#ifdef CONFIG_AT91RM9200
+/* no actual detection for this architecture */
+#define cpu_is_at91rm9200() (1)
+#else
+#define cpu_is_at91rm9200() (0)
+#endif
+
+#ifdef CONFIG_AT91SAM9261
+#define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
+#define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) \
+ || cpu_is_at91sam9xe())
+#else
+#define cpu_is_at91sam9xe() (0)
+#define cpu_is_at91sam9260() (0)
+#endif
+
+#ifdef CONFIG_AT91SAM9261
+#define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
+#else
+#define cpu_is_at91sam9261() (0)
+#endif
+
+#ifdef CONFIG_AT91SAM9261
+#define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
+#else
+#define cpu_is_at91sam9263() (0)
+#endif
+
+#ifdef CONFIG_AT91SAM9RL
+#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
+#else
+#define cpu_is_at91sam9rl() (0)
+#endif
+
+#ifdef CONFIG_AT91CAP9
+#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
+#else
+#define cpu_is_at91cap9() (0)
+#endif
+
+/*
+ * Since this is ARM, we will never run on any AVR32 CPU. But these
+ * definitions may reduce clutter in common drivers.
+ */
+#define cpu_is_at32ap7000() (0)
+
+#endif
Index: u-boot-usb.tmp/include/configs/at91sam9261ek.h
===================================================================
--- u-boot-usb.tmp.orig/include/configs/at91sam9261ek.h 2009-05-02
21:48:36.000000000 +0200
+++ u-boot-usb.tmp/include/configs/at91sam9261ek.h 2009-05-02
22:01:46.000000000 +0200
@@ -45,6 +45,8 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
+#define CONFIG_DISPLAY_CPUINFO 1
+
/*
* Hardware drivers
*/
--
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