On 25/02/14 23:33, Piotr Wilczek wrote: > This patch enables to run Origen board on device tree. > > Uart, DRAM and MMC init functions are removed as their > generic replacements form the common board file are used. > > The config file is modified to contain only board specific options. > > Signed-off-by: Piotr Wilczek <p.wilc...@samsung.com> > Signed-off-by: Kyungmin Park <kyungmin.p...@samsung.com> > Cc: Chander Kashyap <k.chan...@samsung.com> > Cc: Minkyu Kang <mk7.k...@samsung.com> > --- > Changes for v3: > - dts file moved to arch/arm/dts > > Changes for v2: > - no changes > > arch/arm/dts/Makefile | 2 + > arch/arm/dts/exynos4210-origen.dts | 45 ++++++++++++++ > board/samsung/origen/origen.c | 112 +++-------------------------------- > include/configs/origen.h | 117 > +++++++++++++------------------------ > 4 files changed, 96 insertions(+), 180 deletions(-) > create mode 100644 arch/arm/dts/exynos4210-origen.dts > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 2658911..7abca75 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -1,3 +1,5 @@ > +dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb > + > dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ > exynos5250-snow.dtb \ > exynos5250-smdk5250.dtb \ > diff --git a/arch/arm/dts/exynos4210-origen.dts > b/arch/arm/dts/exynos4210-origen.dts > new file mode 100644 > index 0000000..5c9d2ae > --- /dev/null > +++ b/arch/arm/dts/exynos4210-origen.dts > @@ -0,0 +1,45 @@ > +/* > + * Samsung's Exynos4210 based Origen board device tree source > + * > + * Copyright (c) 2014 Samsung Electronics Co., Ltd. > + * http://www.samsung.com > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > + > +/dts-v1/; > +/include/ "skeleton.dtsi" > +/include/ "exynos4.dtsi" > + > +/ { > + model = "Insignal Origen evaluation board based on Exynos4210"; > + compatible = "insignal,origen", "samsung,exynos4210"; > + > + chosen { > + bootargs =""; > + }; > + > + aliases { > + serial0 = "/serial@13800000"; > + console = "/serial@13820000"; > + mmc2 = "sdhci@12530000"; > + }; > + > + sdhci@12510000 { > + status = "disabled"; > + }; > + > + sdhci@12520000 { > + status = "disabled"; > + }; > + > + sdhci@12530000 { > + samsung,bus-width = <4>; > + samsung,timing = <1 2 3>; > + cd-gpios = <&gpio 0x2008002 0>; > + }; > + > + sdhci@12540000 { > + status = "disabled"; > + }; > +}; > \ No newline at end of file > diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c > index 15f77ca..d502f02 100644 > --- a/board/samsung/origen/origen.c > +++ b/board/samsung/origen/origen.c > @@ -11,129 +11,35 @@ > #include <asm/arch/mmc.h> > #include <asm/arch/periph.h> > #include <asm/arch/pinmux.h> > +#include <usb.h> > > DECLARE_GLOBAL_DATA_PTR; > -struct exynos4_gpio_part1 *gpio1; > -struct exynos4_gpio_part2 *gpio2; > > -int board_init(void) > +u32 get_board_rev(void) > { > - gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE; > - gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; > - > - gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); > return 0; > } > > -static int board_uart_init(void) > +int exynos_init(void) > { > - int err; > - > - err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE); > - if (err) { > - debug("UART0 not configured\n"); > - return err; > - } > - > - err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE); > - if (err) { > - debug("UART1 not configured\n"); > - return err; > - } > - > - err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE); > - if (err) { > - debug("UART2 not configured\n"); > - return err; > - } > - > - err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); > - if (err) { > - debug("UART3 not configured\n"); > - return err; > - } > - > return 0; > } > > -#ifdef CONFIG_BOARD_EARLY_INIT_F > -int board_early_init_f(void) > -{ > - int err; > - err = board_uart_init(); > - if (err) { > - debug("UART init failed\n"); > - return err; > - } > - return err; > -} > -#endif > - > -int dram_init(void) > +int board_usb_init(int index, enum usb_init_type init) > { > - gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) > - + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) > - + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) > - + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE); > - > return 0; > } > > -void dram_init_banksize(void) > -{ > - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; > - gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \ > - PHYS_SDRAM_1_SIZE); > - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; > - gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \ > - PHYS_SDRAM_2_SIZE); > - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; > - gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \ > - PHYS_SDRAM_3_SIZE); > - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; > - gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \ > - PHYS_SDRAM_4_SIZE); > -} > - > -#ifdef CONFIG_DISPLAY_BOARDINFO > -int checkboard(void) > +#ifdef CONFIG_USB_CABLE_CHECK > +int usb_cable_connected(void) > { > - printf("\nBoard: ORIGEN\n"); > return 0; > } > #endif > > -#ifdef CONFIG_GENERIC_MMC > -int board_mmc_init(bd_t *bis) > +#ifdef CONFIG_BOARD_EARLY_INIT_F > +int exynos_early_init_f(void) > { > - int i, err; > - > - /* > - * MMC2 SD card GPIO: > - * > - * GPK2[0] SD_2_CLK(2) > - * GPK2[1] SD_2_CMD(2) > - * GPK2[2] SD_2_CDn > - * GPK2[3:6] SD_2_DATA[0:3](2) > - */ > - for (i = 0; i < 7; i++) { > - /* GPK2[0:6] special function 2 */ > - s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2)); > - > - /* GPK2[0:6] drv 4x */ > - s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X); > - > - /* GPK2[0:1] pull disable */ > - if (i == 0 || i == 1) { > - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE); > - continue; > - } > - > - /* GPK2[2:6] pull up */ > - s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP); > - } > - > - err = s5p_mmc_init(2, 4); > - return err; > + return 0; > } > #endif > diff --git a/include/configs/origen.h b/include/configs/origen.h > index f46b833..2c973cb 100644 > --- a/include/configs/origen.h > +++ b/include/configs/origen.h > @@ -6,115 +6,79 @@ > * SPDX-License-Identifier: GPL-2.0+ > */ > > -#ifndef __CONFIG_H > -#define __CONFIG_H > +#ifndef __CONFIG_ORIGEN_H > +#define __CONFIG_ORIGEN_H > + > +#include <configs/exynos4-dt.h> > + > +#define CONFIG_SYS_PROMPT "ORIGEN # " > + > +#undef CONFIG_DEFAULT_DEVICE_TREE > +#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-origen > > /* High Level Configuration Options */ > -#define CONFIG_SAMSUNG 1 /* SAMSUNG core */ > -#define CONFIG_S5P 1 /* S5P Family */ > #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ > #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ > > -#include <asm/arch/cpu.h> /* get chip and board defs */ > - > -#define CONFIG_ARCH_CPU_INIT > -#define CONFIG_DISPLAY_CPUINFO > -#define CONFIG_DISPLAY_BOARDINFO > -#define CONFIG_BOARD_EARLY_INIT_F > - > #define CONFIG_SYS_DCACHE_OFF 1 > > +/* ORIGEN has 4 bank of DRAM */ > +#define CONFIG_NR_DRAM_BANKS 4 > #define CONFIG_SYS_SDRAM_BASE 0x40000000 > -#define CONFIG_SYS_TEXT_BASE 0x43E00000 > +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE > +#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ > > -/* input clock of PLL: ORIGEN has 24MHz input clock */ > -#define CONFIG_SYS_CLK_FREQ 24000000 > +/* memtest works on */ > +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE > +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + > 0x6000000) > +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) > > -#define CONFIG_SETUP_MEMORY_TAGS > -#define CONFIG_CMDLINE_TAG > -#define CONFIG_INITRD_TAG > -#define CONFIG_CMDLINE_EDITING > +#define CONFIG_SYS_TEXT_BASE 0x43E00000 > > #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN > > -/* Power Down Modes */ > -#define S5P_CHECK_SLEEP 0x00000BAD > -#define S5P_CHECK_DIDLE 0xBAD00000 > -#define S5P_CHECK_LPA 0xABAD0000 > - > /* Size of malloc() pool */ > -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) > +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) > > /* select serial console configuration */ > -#define CONFIG_SERIAL2 1 /* use SERIAL 2 */ > +#define CONFIG_SERIAL2 > #define CONFIG_BAUDRATE 115200 > -#define EXYNOS4_DEFAULT_UART_OFFSET 0x020000 > > -#define CONFIG_SKIP_LOWLEVEL_INIT > +/* Console configuration */ > +#define CONFIG_SYS_CONSOLE_INFO_QUIET > +#define CONFIG_SYS_CONSOLE_IS_IN_ENV > + > +#define CONFIG_BOOTARGS "Please use defined boot" > +#define CONFIG_BOOTCOMMAND "run mmcboot" > +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" > > -/* SD/MMC configuration */ > -#define CONFIG_GENERIC_MMC > -#define CONFIG_MMC > -#define CONFIG_SDHCI > -#define CONFIG_S5P_SDHCI > +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ > + - GENERATED_GBL_DATA_SIZE) > > -/* PWM */ > -#define CONFIG_PWM 1 > +#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ > > -/* allow to overwrite serial and ethaddr */ > -#define CONFIG_ENV_OVERWRITE > +#define CONFIG_SYS_MONITOR_BASE 0x00000000 > > -/* Command definition*/ > -#include <config_cmd_default.h> > +/* Power Down Modes */ > +#define S5P_CHECK_SLEEP 0x00000BAD > +#define S5P_CHECK_DIDLE 0xBAD00000 > +#define S5P_CHECK_LPA 0xABAD0000 > > #undef CONFIG_CMD_PING > #define CONFIG_CMD_ELF > #define CONFIG_CMD_DHCP > -#define CONFIG_CMD_MMC > -#define CONFIG_CMD_FAT > #undef CONFIG_CMD_NET > #undef CONFIG_CMD_NFS > > -#define CONFIG_BOOTDELAY 3 > -#define CONFIG_ZERO_BOOTDELAY_CHECK > /* MMC SPL */ > #define CONFIG_SPL > #define COPY_BL2_FNPTR_ADDR 0x02020030 > > #define CONFIG_SPL_TEXT_BASE 0x02021410 > > +#undef CONFIG_BOOTCOMMAND > #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" > > -/* Miscellaneous configurable options */ > -#define CONFIG_SYS_LONGHELP /* undef to save memory */ > -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser > */ > -#define CONFIG_SYS_PROMPT "ORIGEN # " > -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/ > -#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ > -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ > -#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" > -/* Boot Argument Buffer Size */ > -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE > -/* memtest works on */ > -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE > -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + > 0x6000000) > -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) > - > -/* ORIGEN has 4 bank of DRAM */ > -#define CONFIG_NR_DRAM_BANKS 4 > -#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ > -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE > -#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE > -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) > -#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE > -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) > -#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE > -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) > -#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE > - > -/* FLASH and environment organization */ > -#define CONFIG_SYS_NO_FLASH 1 > -#undef CONFIG_CMD_IMLS > #define CONFIG_IDENT_STRING " for ORIGEN" > > #define CONFIG_CLK_1000_400_200 > @@ -122,17 +86,17 @@ > /* MIU (Memory Interleaving Unit) */ > #define CONFIG_MIU_2BIT_21_7_INTERLEAVED > > -#define CONFIG_ENV_IS_IN_MMC 1 > -#define CONFIG_SYS_MMC_ENV_DEV 0 > +#undef CONFIG_ENV_SIZE
Sorry, I didn't catch it at v2 patch. It's better define each boards than undef. > #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ > #define RESERVE_BLOCK_SIZE (512) > #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ > +#undef CONFIG_ENV_OFFSET ditto. > #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) > -#define CONFIG_DOS_PARTITION 1 > > #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" > #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) > > +#undef CONFIG_SYS_INIT_SP_ADDR ditto. > #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 > > /* U-boot copy size from boot Media to DRAM.*/ > @@ -140,7 +104,6 @@ > #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) > #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) > > -/* Enable devicetree support */ > -#define CONFIG_OF_LIBFDT > +#undef CONFIG_CMD_I2C ditto. Thanks, Minkyu Kang. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
