Modify code to adapt to both u-qe and qe.

U_QE is a kind of cutted QE.
the differences between U_QE and QE
        1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs.
        2. IMMR: have different immr base addr.
        3. iopin: U_QE doesn't need to config iopin.

Signed-off-by: Zhao Qiang <b45...@freescale.com>
---
Changes for v2:
        - modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and 
CONFIG_SYS_QE_FW_ADDR
Changes for v3:
        - use CONFIG_U_QE instead of CONFIG_PPC_T1040
Changes for v4:
        - ifdef CONFIG_U_QE, include "../../../../drivers/qe/qe.h"
Changes for v5:
        - no
Changes for v6:
        - rebase
Changes for v7:
        - split to two patches, the one to support u-qe and the other is to add 
u-qe to t1040qds

 arch/powerpc/cpu/mpc85xx/cpu_init.c       | 16 +++++++++++++---
 arch/powerpc/cpu/mpc85xx/qe_io.c          |  2 +-
 arch/powerpc/cpu/mpc85xx/speed.c          |  4 ++++
 arch/powerpc/cpu/mpc85xx/t1040_ids.c      |  1 +
 arch/powerpc/include/asm/config_mpc85xx.h |  3 +++
 arch/powerpc/include/asm/fsl_liodn.h      |  4 ++++
 arch/powerpc/include/asm/immap_85xx.h     |  5 ++++-
 drivers/qe/qe.h                           |  2 ++
 8 files changed, 32 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c 
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index e0fb3e5..8e327b1 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -33,6 +33,9 @@
 #endif
 
 #include "../../../../drivers/block/fsl_sata.h"
+#ifdef CONFIG_U_QE
+#include "../../../../drivers/qe/qe.h"
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -84,7 +87,7 @@ void fsl_erratum_a006261_workaround(struct ccsr_usb_phy 
__iomem *usb_phy)
 #endif
 
 
-#ifdef CONFIG_QE
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
 extern qe_iop_conf_t qe_iop_conf_tab[];
 extern void qe_config_iopin(u8 port, u8 pin, int dir,
                                int open_drain, int assign);
@@ -309,10 +312,12 @@ void cpu_init_f (void)
 #if defined(CONFIG_CPM2)
        m8560_cpm_reset();
 #endif
-#ifdef CONFIG_QE
+
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
        /* Config QE ioports */
        config_qe_ioports();
 #endif
+
 #if defined(CONFIG_FSL_DMA)
        dma_init();
 #endif
@@ -797,8 +802,13 @@ int sata_initialize(void)
 
 void cpu_secondary_init_r(void)
 {
-#ifdef CONFIG_QE
+#ifdef CONFIG_U_QE
+       uint qe_base = CONFIG_SYS_IMMR + 0x00140000; /* QE immr base */
+#elif defined CONFIG_QE
        uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
+#endif
+
+#ifdef CONFIG_QE
 #ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
        int ret;
        size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
diff --git a/arch/powerpc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c
index 76c60da..d2825ec 100644
--- a/arch/powerpc/cpu/mpc85xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc85xx/qe_io.c
@@ -12,7 +12,7 @@
 #include "asm/io.h"
 #include "asm/immap_85xx.h"
 
-#if defined(CONFIG_QE)
+#if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
 #define        NUM_OF_PINS     32
 void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
 {
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index adf09ef..488fd5e 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -336,6 +336,10 @@ void get_sys_info(sys_info_t *sys_info)
 
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
+#ifdef CONFIG_U_QE
+       sys_info->freq_qe =  sys_info->freq_systembus / 2;
+#endif
+
 #else /* CONFIG_FSL_CORENET */
        uint plat_ratio, e500_ratio, half_freq_systembus;
        int i;
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c 
b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
index 68160a9..1034cd4 100644
--- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
@@ -46,6 +46,7 @@ struct liodn_id_table liodn_tbl[] = {
        SET_DMA_LIODN(2, 227),
 
        /* SET_NEXUS_LIODN(557), -- not yet implemented */
+       SET_QE_LIODN(559),
 };
 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
 
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index 9a20b97..943ca6f 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -734,6 +734,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_FSL_ERRATUM_A006261
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0xfe000000
+#define QE_MURAM_SIZE          0x6000UL
+#define MAX_QE_RISC            1
+#define QE_NUM_OF_SNUM         28
 
 #elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
 #define CONFIG_E6500
diff --git a/arch/powerpc/include/asm/fsl_liodn.h 
b/arch/powerpc/include/asm/fsl_liodn.h
index 44bc88d..f658bcb 100644
--- a/arch/powerpc/include/asm/fsl_liodn.h
+++ b/arch/powerpc/include/asm/fsl_liodn.h
@@ -99,6 +99,10 @@ extern void fdt_fixup_liodn(void *blob);
        SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
                CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
 
+#define SET_QE_LIODN(liodn) \
+       SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
+               CONFIG_SYS_MPC85xx_QE_OFFSET)
+
 #define SET_QMAN_LIODN(liodn) \
        SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
                CONFIG_SYS_FSL_QMAN_OFFSET, \
diff --git a/arch/powerpc/include/asm/immap_85xx.h 
b/arch/powerpc/include/asm/immap_85xx.h
index 4b6f9d0..4bda0f1 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1889,7 +1889,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
        u32     sata2liodnr;    /* SATA 2 LIODN */
        u32     sata3liodnr;    /* SATA 3 LIODN */
        u32     sata4liodnr;    /* SATA 4 LIODN */
-       u8      res22[32];
+       u8      res22[24];
+       u32     qeliodnr;       /* QE LIODN */
+       u8      res_57c[4];
        u32     dma1liodnr;     /* DMA 1 LIODN */
        u32     dma2liodnr;     /* DMA 2 LIODN */
        u32     dma3liodnr;     /* DMA 3 LIODN */
@@ -2877,6 +2879,7 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_LBC_OFFSET          0x124000
 #define CONFIG_SYS_MPC85xx_IFC_OFFSET          0x124000
 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET         0x130000
+#define CONFIG_SYS_MPC85xx_QE_OFFSET           0x140000
 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET     0x1e0000
 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\
        && !defined(CONFIG_PPC_B4420)
diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h
index c82ac7b..ebb7c5f 100644
--- a/drivers/qe/qe.h
+++ b/drivers/qe/qe.h
@@ -282,5 +282,7 @@ int qe_set_mii_clk_src(int ucc_num);
 int qe_upload_firmware(const struct qe_firmware *firmware);
 struct qe_firmware_info *qe_get_firmware_info(void);
 void ft_qe_setup(void *blob);
+void qe_init(uint qe_base);
+void qe_reset(void);
 
 #endif /* __QE_H__ */
-- 
1.8.5


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