Hi Tim,
On 04/29/2014 11:19 AM, Tim Harvey wrote:
On Tue, Apr 29, 2014 at 8:15 AM, Eric Nelson
<eric.nel...@boundarydevices.com> wrote:
Hi Tim,
<snip>
Do you think that someone will want to use SPL on i.MX6 with
support for only one of the variants?
It seems that this should be conditionally included if
i.MX6DQ is supported by the board.
Eric,
Yes - that makes sense. Someone could have a single CPU but have
several memory variants. I'm not sure how much codespace it will save
but things are tight at 64KB max.
I can wrap the functions and their calls with an:
#if defined(MX6QDL) || defined(MX6Q) || defined(MX6D)
Perfect.
+/* Configure MX6DQ mmdc iomux */
+void mx6dq_dram_iocfg(unsigned width,
+ const struct mx6dq_iomux_ddr_regs *ddr,
+ const struct mx6dq_iomux_grp_regs *grp)
+{
+ volatile struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux;
...
Ditto for i.MX6SDL:
and:
#if defined(MX6QDL) || defined(MX6DL) || defined(MX6S)
Cool.
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