>From: Stefan Roese [mailto:s...@denx.de]
>
>From: Marek Belisko <marek.beli...@gmail.com>
>
>On some NAND devices (e.g. Hynix H27U2G8F2CTR-BI on Siemens DXR2 /
>Draco boards) the SPL issues the following bit-flip error messages:
>
>nand: bit-flip corrected @oob=0
>...
>
>This patch makes sure that only the required address cycles are sent
>to the NAND chip.
>
>The same issue has been reported by Bacem Daassi:
>
>http://e2e.ti.com/support/arm/sitara_arm/f/791/t/259699.aspx
>
>"
>The issue is mainly due to a NAND protocol violation in the omap driver since
>the Random Data Output command (05h-E0h) expects to see only the column address
>that should be addressed within the already loaded read page into the read
>buffer. Only 2 address cycles with ALE active should be provided between the
>05h and E0h commands. The Page read command expects the full address footprint
>(2bytes for column address + 3bytes for row address), but once the page is
>loaded into the read buffer, Random Data Output should be used with only 2bytes
>for column address.
>"
>
>Signed-off-by: Marek Belisko <marek.beli...@gmail.com>
>Signed-off-by: Stefan Roese <s...@denx.de>
>Tested-by: Samuel Egli <samuel.e...@siemens.com>
>Cc: Pekon Gupta <pe...@ti.com>
>Cc: Scott Wood <scottw...@freescale.com>
>---
Thanks Stefan,
I was just about to re-send same patch with Marek's authorship.
But as this is change in common code, can you please add below reference
to datasheets from other NAND device vendors, in you commit message.
"NAND_CMD_RNDOUT (05h-E0h) needs only two cycles of column address to access
data
from different column within the same page. So expected sequence on NAND
data-bus is
<05h> <column-addr-byte1> <column-address-byte2> <E0h>
References in datasheets of parts from different NAND vendors
+--------+------------------------+---------------------------------------------
|Vendor | Datasheet/Part# | Reference
+--------+------------------------+---------------------------------------------
|Spansion| S34ML{01|02|04}G2 | Figure 6.12 Random Data Output In a Page
|Micron | MT29F{16|32|64|128}G08A| Figure 47: CHANGE READ COLUMN (05h-E0h)
Operation
|Macronix| MX30LF1G08AA | Figure 10. AC Waveforms for Random Data
Output
|Toshiba | TC58NVG1S3ETAI0 | Figure Column Address Change in Read Cycle
Timing Diagram (2/2)
+--------+------------------------+---------------------------------------------
Though most NAND Devices mentioned above tend to work even if extra cycles of
page-address is issued between <05h> .... <E0h> command. But Spansion devices
break on this non-compliance.
This patch fixes chip->cmdfunc() for all devices, as datasheet of all mentioned
vendor expect same sequence."
Also, same change is required in drivers/mtd/nand/nand_spl_simple.c
So, you can as well just put both in same patch.
with regards, Pekon
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