On 05/09/2014 11:28 AM, Simon Glass wrote:
> This is an implementation of GPIOs for Tegra that uses driver model. It has
> been tested on trimslice and also using the new iotrace feature.
> 
> The implementation uses a top-level GPIO device (which has no actual GPIOS).
> Under this all the banks are created as separate GPIO devices.

I still believe that there is a single Tegra GPIO controller, and this
should be represented by a single device in the U-Boot device model.

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