To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.
Signed-off-by: Chin Liang See <cl...@altera.com>
Cc: Pantelis Antoniou <pa...@antoniou-consulting.com>
Cc: Rajeshwari Shinde <rajeshwar...@samsung.com>
Cc: Jaehoon Chung <jh80.ch...@samsung.com>
Cc: Mischa Jonker <mjon...@synopsys.com>
---
drivers/mmc/dw_mmc.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 5bf36a0..0df30bc 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -245,7 +245,10 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32
freq)
return -EINVAL;
}
- div = DIV_ROUND_UP(sclk, 2 * freq);
+ if (sclk == freq)
+ div = 0; /* bypass mode */
+ else
+ div = DIV_ROUND_UP(sclk, 2 * freq);
dwmci_writel(host, DWMCI_CLKENA, 0);
dwmci_writel(host, DWMCI_CLKSRC, 0);
--
1.7.9.5
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