On 08/18/2014 07:55 PM, Alison Wang wrote:
> From: Jingchang Lu <jingchang...@freescale.com>
>
> On vybrid, lpuart's registers are 8-bit. On LS102xA, lpuart's registers
> are 32-bit. This patch adds the support for 32-bit registers on
> LS102xA.
>
> Signed-off-by: Jingchang Lu <jingchang...@freescale.com>
> Signed-off-by: Yuan Yao <yao.y...@freescale.com>
> ---
> Change log:
> v5: No change.
> v4: Add commit messages.
> v3: New file.
>
> drivers/serial/serial_lpuart.c | 122
> +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 122 insertions(+)
>
> diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
> index da5f9a2..6e639b7 100644
> --- a/drivers/serial/serial_lpuart.c
> +++ b/drivers/serial/serial_lpuart.c
> @@ -17,10 +17,34 @@
> #define UC2_TE (1 << 3)
> #define UC2_RE (1 << 2)
>
> +#define STAT_LBKDIF (1 << 31)
> +#define STAT_RXEDGIF (1 << 30)
> +#define STAT_TDRE (1 << 23)
> +#define STAT_RDRF (1 << 21)
> +#define STAT_IDLE (1 << 20)
> +#define STAT_OR (1 << 19)
> +#define STAT_NF (1 << 18)
> +#define STAT_FE (1 << 17)
> +#define STAT_PF (1 << 16)
> +#define STAT_MA1F (1 << 15)
> +#define STAT_MA2F (1 << 14)
> +#define STAT_FLAGS (STAT_LBKDIF | STAT_RXEDGIF | STAT_IDLE | STAT_OR | \
> + STAT_NF | STAT_FE | STAT_PF | STAT_MA1F | STAT_MA2F)
> +
> +#define CTRL_TE (1 << 19)
> +#define CTRL_RE (1 << 18)
> +
> +#define FIFO_TXFE 0x80
> +#define FIFO_RXFE 0x40
> +
> +#define WATER_TXWATER_OFF 1
> +#define WATER_RXWATER_OFF 16
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE;
>
> +#ifndef CONFIG_LPUART_32B_REG
> static void lpuart_serial_setbrg(void)
> {
> u32 clk = mxc_get_clock(MXC_UART_CLK);
> @@ -107,13 +131,111 @@ static struct serial_device lpuart_serial_drv = {
> .getc = lpuart_serial_getc,
> .tstc = lpuart_serial_tstc,
> };
> +#else
> +static void lpuart32_serial_setbrg(void)
> +{
> + u32 clk = CONFIG_SYS_CLK_FREQ;
> + u32 sbr;
> +
> + if (!gd->baudrate)
> + gd->baudrate = CONFIG_BAUDRATE;
> +
> + sbr = (clk / (16 * gd->baudrate));
> + /* place adjustment later - n/32 BRFA */
> +
> + out_be32(&base->baud, sbr);
> +}
> +
> +static int lpuart32_serial_getc(void)
> +{
> + u32 stat;
> +
> + while (((stat = in_be32(&base->stat)) & STAT_RDRF) == 0) {
> + out_be32(&base->stat, STAT_FLAGS);
> + WATCHDOG_RESET();
> + }
> +
> + return in_be32(&base->data) & 0x3ff;
> +}
> +
> +static void lpuart32_serial_putc(const char c)
> +{
> + if (c == '\n')
> + serial_putc('\r');
> +
> + while (!(in_be32(&base->stat) & STAT_TDRE))
> + WATCHDOG_RESET();
> +
> + out_be32(&base->data, c);
> +}
> +
> +/*
> + * Test whether a character is in the RX buffer
> + */
> +static int lpuart32_serial_tstc(void)
> +{
> + if ((in_be32(&base->water) >> 24) == 0)
> + return 0;
> +
> + return 1;
> +}
> +
> +/*
> + * Initialise the serial port with the given baudrate. The settings
> + * are always 8 data bits, no parity, 1 stop bit, no start bits.
> + */
> +static int lpuart32_serial_init(void)
> +{
> + u8 ctrl;
> +
> + ctrl = in_be32(&base->ctrl);
> + ctrl &= ~CTRL_RE;
> + ctrl &= ~CTRL_TE;
> + out_be32(&base->ctrl, ctrl);
> +
> + out_be32(&base->modir, 0);
> + out_be32(&base->fifo, ~(FIFO_TXFE | FIFO_RXFE));
> +
> + out_be32(&base->match, 0);
> + /* provide data bits, parity, stop bit, etc */
> +
> + serial_setbrg();
> +
> + out_be32(&base->ctrl, CTRL_RE | CTRL_TE);
> +
> + return 0;
> +}
> +
> +static struct serial_device lpuart32_serial_drv = {
> + .name = "lpuart32_serial",
> + .start = lpuart32_serial_init,
> + .stop = NULL,
> + .setbrg = lpuart32_serial_setbrg,
> + .putc = lpuart32_serial_putc,
> + .puts = default_serial_puts,
> + .getc = lpuart32_serial_getc,
> + .tstc = lpuart32_serial_tstc,
> +};
> +#endif
> +void lpuart32_serial_initialize(void)
> +{
> + serial_register(&lpuart32_serial_drv);
> +}
This breaks any board without CONFIG_LPUART_32B_REG defined, for example
vf610twr. Please fix.
York
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