On 08/18/2014 01:16 AM, Thierry Reding wrote:
From: Thierry Reding <tred...@nvidia.com>
This function is required by PCIe and SATA. This patch implements it on
Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
it doesn't support PCIe or SATA.
I see no issue with the structure of the code so,
Acked-by: Stephen Warren <swar...@nvidia.com>
I know too little about the CAR/PLLE to comment on the actual register
IO performed here; someone like Peter De Schrijver should review this
really...
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