The TDAR bit is set when the descriptors are all out from TX ring, but the descriptor properly is in transmitting not READY. These are two signals, and in Ic simulation, we found the TDAR always clear prior than the READY bit of last BD. In mx6solox, we use a latest version of FEC IP. It looks the intrinsic behave of TDAR bit is changed in this FEC version, not any bug in mx6sx.
There are some solutions for this problem. Which would be acceptable? 1. Change the TDAR polling to checking the READY bit in BD. 2. Add polling the READY bit of BD after the TDAR polling. 3. Add a delay after the TDAR polling. Best regards, Ye Li -----Original Message----- From: Marek Vasut [mailto:ma...@denx.de] Sent: Thursday, August 21, 2014 11:53 AM To: Fabio Estevam Cc: joe.hershber...@gmail.com; sba...@denx.de; u-boot@lists.denx.de; Li Ye-B37916; ota...@ossystems.com.br; Estevam Fabio-R49496 Subject: Re: [PATCH v2 2/2] net: fec_mxc: Do not error out when FEC_TBD_READY On Wednesday, August 20, 2014 at 11:24:36 PM, Fabio Estevam wrote: > From: Fabio Estevam <fabio.este...@freescale.com> > > Do not indicate an error when the buffer ready flag (FEC_TBD_READY) is set. > > Without this change, mx6solox is not capable of doing TFTP transfers. > > Succesfully tested on mx25, mx28, mx51, mx53, mx6q, mx6sl and mx6sx. > > Signed-off-by: Fabio Estevam <fabio.este...@freescale.com> > --- > Changes since v1: > - None > > drivers/net/fec_mxc.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index > 1a5105e..2699f5a 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -726,8 +726,6 @@ static int fec_send(struct eth_device *dev, void > *packet, int length) ret = -EINVAL; > > invalidate_dcache_range(addr, addr + size); > - if (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) > - ret = -EINVAL; Uh, this means that if the buffer didn't complete for whatever reason, you will happily proceed and claim that this buffer you sent is really sent. You will never figure out that you need to re-send it. Sorry, but such a change cannot be applied, since that just allows errors to creep in. Is there a bug in the MX6SX or something so that it doesn't set this bit ? Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
