On Tue, Jul 22, 2014 at 04:03:24PM +0530, pekon gupta wrote: > This patch adds support for parallel NOR device (S29GL512S10) present on > J6-EVM. > The Flash device is connected to GPMC controller on chip-select[0] and > accessed > as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) > and > is CFI compatible. > > As multiple devices are share GPMC pins on this board, so following board > settings are required to detect NOR device: > SW5.1 (NAND_BOOTn) = OFF (logic-1) > SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */ > SW5.3 (eMMC_BOOTn) = OFF (logic-1) > SW5.4 (QSPI_BOOTn) = OFF (logic-1) > > And also set appropriate SYSBOOT configurations: > SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ > SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ > SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ > SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */ > SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */ > SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ > SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ > SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ > > Also, following changes are required to enable NOR Flash support in > dra7xx_evm board profile: > > diff --git a/boards.cfg b/boards.cfg > -Active arm armv7 omap5 ti dra7xx > dra7xx_evm dra7xx_evm:CONS_INDEX=1 > > Lokesh Vutla <lokeshvu...@ti.com> > +Active arm armv7 omap5 ti dra7xx > dra7xx_evm dra7xx_evm:CONS_INDEX=1,NOR > > Lokesh Vutla <lokeshvu...@ti.com> > > Signed-off-by: Pekon Gupta <pe...@ti.com>
Applied to u-boot-ti/master, thanks! -- Tom
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