The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v7: None
Changes in v6:
- Move U-Boot changes into their own file
- Use exynos54xx everywhere instead of exynos5420
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++++++++++++++++
arch/arm/dts/exynos4210-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46 ++++++++++++++++++++++++++
arch/arm/dts/exynos4x12-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40 +++++++++++++++++++++++
arch/arm/dts/exynos5250-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 52 ++++++++++++++++++++++++++++++
arch/arm/dts/exynos54xx-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos54xx.dtsi | 11 +++++++
9 files changed, 184 insertions(+)
create mode 100644 arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..ee071c1
--- /dev/null
+++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
@@ -0,0 +1,27 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@11400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos4210-pinctrl";
+ };
+
+ pinctrl_1: pinctrl@11000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpy0: gpy0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_2: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos4210-pinctrl.dtsi
b/arch/arm/dts/exynos4210-pinctrl.dtsi
index bda17f7..87f162b 100644
--- a/arch/arm/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/dts/exynos4210-pinctrl.dtsi
@@ -14,6 +14,8 @@
* published by the Free Software Foundation.
*/
+#include "exynos4210-pinctrl-uboot.dtsi"
+
/ {
pinctrl@11400000 {
gpa0: gpa0 {
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..c02796d
--- /dev/null
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -0,0 +1,46 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@11400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpf0: gpf0 {
+ reg = <0xc180>;
+ };
+ gpj0: gpj0 {
+ reg = <0x240>;
+ };
+ };
+
+ pinctrl_1: pinctrl@11000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpk0: gpk0 {
+ reg = <0x40>;
+ };
+ gpm0: gpm0 {
+ reg = <0x260>;
+ };
+ gpy0: gpy0 {
+ reg = <0x120>;
+ };
+ gpx0: gpx0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_2: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl_3: pinctrl@106E0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos4x12-pinctrl.dtsi
b/arch/arm/dts/exynos4x12-pinctrl.dtsi
index 93f3998..f40de1f 100644
--- a/arch/arm/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/dts/exynos4x12-pinctrl.dtsi
@@ -12,6 +12,8 @@
* published by the Free Software Foundation.
*/
+#include "exynos4x12-pinctrl-uboot.dtsi"
+
/ {
pinctrl@11400000 {
gpa0: gpa0 {
diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..7edb0ca
--- /dev/null
+++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
@@ -0,0 +1,40 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@11400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpc4: gpc4 {
+ reg = <0x2e0>;
+ };
+ gpx0: gpx0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_1: pinctrl@13400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl_2: pinctrl@10d10000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpv2: gpv2 {
+ reg = <0x060>;
+ };
+ gpv4: gpv4 {
+ reg = <0xc0>;
+ };
+ };
+
+ pinctrl_3: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos5250-pinctrl.dtsi
b/arch/arm/dts/exynos5250-pinctrl.dtsi
index 67755a1..706b888 100644
--- a/arch/arm/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/dts/exynos5250-pinctrl.dtsi
@@ -12,6 +12,8 @@
* published by the Free Software Foundation.
*/
+#include "exynos5250-pinctrl-uboot.dtsi"
+
/ {
pinctrl@11400000 {
gpa0: gpa0 {
diff --git a/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
new file mode 100644
index 0000000..197eb13
--- /dev/null
+++ b/arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
@@ -0,0 +1,52 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ /*
+ * Replicate the ordering of arch/arm/include/asm/arch-exynos/gpio.h
+ * TODO(s...@chromium.org): Remove this once GPIO numbers are not
+ * needed in U-Boot for exynos.
+ */
+ pinctrl@14010000 {
+ };
+ pinctrl@13400000 {
+ };
+ pinctrl@13410000 {
+ };
+ pinctrl@14000000 {
+ };
+ pinctrl@03860000 {
+ };
+
+ pinctrl@13400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpx0: gpx0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl@13410000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl@14000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl@14010000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos54xx-pinctrl.dtsi
b/arch/arm/dts/exynos54xx-pinctrl.dtsi
index b3e63d1..775d956 100644
--- a/arch/arm/dts/exynos54xx-pinctrl.dtsi
+++ b/arch/arm/dts/exynos54xx-pinctrl.dtsi
@@ -12,6 +12,8 @@
* published by the Free Software Foundation.
*/
+#include "exynos54xx-pinctrl-uboot.dtsi"
+
/ {
pinctrl@13400000 {
gpy7: gpy7 {
diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
index 1a765ab..22792e3 100644
--- a/arch/arm/dts/exynos54xx.dtsi
+++ b/arch/arm/dts/exynos54xx.dtsi
@@ -6,6 +6,7 @@
*/
#include "exynos5.dtsi"
+#include "exynos54xx-pinctrl.dtsi"
/ {
aliases {
@@ -132,6 +133,8 @@
};
pinctrl_0: pinctrl@13400000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "samsung,exynos5420-pinctrl";
reg = <0x13400000 0x1000>;
interrupts = <0 45 0>;
@@ -144,24 +147,32 @@
};
pinctrl_1: pinctrl@13410000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "samsung,exynos5420-pinctrl";
reg = <0x13410000 0x1000>;
interrupts = <0 78 0>;
};
pinctrl_2: pinctrl@14000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "samsung,exynos5420-pinctrl";
reg = <0x14000000 0x1000>;
interrupts = <0 46 0>;
};
pinctrl_3: pinctrl@14010000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "samsung,exynos5420-pinctrl";
reg = <0x14010000 0x1000>;
interrupts = <0 50 0>;
};
pinctrl_4: pinctrl@03860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "samsung,exynos5420-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <0 47 0>;
--
2.1.0.rc2.206.gedb03e5
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