Op 30 sep. 2014, om 14:02 heeft Hans de Goede <hdego...@redhat.com> het volgende geschreven:
> Hi, > > On 09/29/2014 08:35 PM, jonsm...@gmail.com wrote: >> On Mon, Sep 29, 2014 at 2:16 PM, Karsten Merker <mer...@debian.org> wrote: >>> On Mon, Sep 29, 2014 at 09:13:37AM +0300, Siarhei Siamashka wrote: >>>> How did you come to the idea to poke these bits? >>> >>> The linux 3.4 kernel from https://github.com/LeMaker/linux-bananapi >>> (which is a patched linux-sunxi.org 3.4 kernel) does not show this >>> problem, so we started looking into what is different there, and the >>> relevant change that was found was setting these particular >>> undocumented bits. >> >> File at issue here asking for the documentation >> https://github.com/allwinner-zh/documents > > I'm already talking to Allwinner about this, it seems that bits > 10-11, or more likely 10-12 of the gmac clk register are the tx > equivalent of bits 5-7, "Configure GMAC receive clock delay > chain". I think this is there to deal with the pcb data and clk > traces not having the same length, so that this is highly board > specific. I'm waiting on confirmation on this from Allwinner, > as well as some info on the unit of this 0-7 value. Gbit ethernet requires a delay between the lines, which you can implement by adding 10cm or so extra trace on the PCB or tell the MAC or PHY to do it in software. Very board specific, but so far I've only seen Intel reference designs use the extra trace length method most arm/ppc/mips gbit boards use a PHY that handles it in hardware on request like the GMAC is doing above. regards, Koen _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
