Hi Simon, On Fri, Dec 5, 2014 at 7:59 AM, Simon Glass <s...@chromium.org> wrote: > Hi Bin, > > On 4 December 2014 at 08:03, Bin Meng <bmeng...@gmail.com> wrote: >> Signed-off-by: Bin Meng <bmeng...@gmail.com> >> --- >> arch/x86/cpu/queensbay/tnc.c | 26 +++++++++++++++++++++++++- >> include/configs/crownbay.h | 2 ++ >> 2 files changed, 27 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c >> index c0d19aa..eea70c0 100644 >> --- a/arch/x86/cpu/queensbay/tnc.c >> +++ b/arch/x86/cpu/queensbay/tnc.c >> @@ -6,17 +6,41 @@ >> >> #include <common.h> >> #include <asm/io.h> >> +#include <asm/pci.h> >> #include <asm/post.h> >> #include <asm/arch/fsp/fsp_support.h> >> >> +/* PCI Configuration Space (D31:F0): LPC */ >> +#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0) > > Can this go in a header file somwhere?
Sure. >> + >> +static void unprotect_spi_flash(void) >> +{ >> + u32 bc; >> + >> + bc = pci_read_config32(PCH_LPC_DEV, 0xd8); >> + bc |= 0x1; /* unprotect the flash */ >> + pci_write_config32(PCH_LPC_DEV, 0xd8, bc); >> +} >> + >> int arch_cpu_init(void) >> { >> + struct pci_controller *hose; >> + int ret; >> + >> post_code(POST_CPU_INIT); >> #ifdef CONFIG_SYS_X86_TSC_TIMER >> timer_set_base(rdtsc()); >> #endif >> >> - return x86_cpu_init_f(); >> + x86_cpu_init_f(); > > Need to check error return. Looks like x86_cpu_init_f() always returns 0, but it is no harm to do the check return. I will do it in v2. [snip] Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot