On Wed 2014-12-31 20:14:54, Marek Vasut wrote: > Add support for the Altera Arria V development kit. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Chin Liang See <cl...@opensource.altera.com> > Cc: Dinh Nguyen <dingu...@opensource.altera.com> > Cc: Pavel Machek <pa...@denx.de> > Cc: Stefan Roese <s...@denx.de> > Cc: Vince Bridgers <vbrid...@opensource.altera.com> > --- > arch/arm/Kconfig | 5 +
> board/altera/socfpga/iocsr_config.c | 688 > +++++++++++++++++++++++++++++++++++ > board/altera/socfpga/iocsr_config.h | 9 + > board/altera/socfpga/pinmux_config.c | 215 +++++++++++ These are normally autogenerated, how does that work? > board/altera/socfpga/socfpga.c | 7 + > configs/socfpga_arria5_defconfig | 3 + > include/configs/socfpga_arria5.h | 107 ++++++ These look better. Can more defines be moved to common socfpga.h. Thanks, Pavel > diff --git a/include/configs/socfpga_arria5.h > b/include/configs/socfpga_arria5.h > new file mode 100644 > index 0000000..668a91e > --- /dev/null > +++ b/include/configs/socfpga_arria5.h > @@ -0,0 +1,107 @@ > +/* > + * Copyright (C) 2014 Marek Vasut <ma...@denx.de> > + * > + * SPDX-License-Identifier: GPL-2.0+ > + */ > +#ifndef __CONFIG_SOCFPGA_ARRIA5_H__ > +#define __CONFIG_SOCFPGA_ARRIA5_H__ > + > +#include <asm/arch/socfpga_base_addrs.h> > +#include "../../board/altera/socfpga/pinmux_config.h" > +#include "../../board/altera/socfpga/iocsr_config.h" > +#include "../../board/altera/socfpga/pll_config.h" > + > +/* U-Boot Commands */ > +#define CONFIG_SYS_NO_FLASH > +#include <config_cmd_default.h> > +#define CONFIG_DOS_PARTITION > +#define CONFIG_FAT_WRITE > +#define CONFIG_HW_WATCHDOG > + > +#define CONFIG_CMD_ASKENV > +#define CONFIG_CMD_BOOTZ > +#define CONFIG_CMD_CACHE > +#define CONFIG_CMD_DFU > +#define CONFIG_CMD_DHCP > +#define CONFIG_CMD_EXT4 > +#define CONFIG_CMD_EXT4_WRITE > +#define CONFIG_CMD_FAT > +#define CONFIG_CMD_FPGA > +#define CONFIG_CMD_FS_GENERIC > +#define CONFIG_CMD_GREPENV > +#define CONFIG_CMD_MII > +#define CONFIG_CMD_MMC > +#define CONFIG_CMD_NET > +#define CONFIG_CMD_PING > +#define CONFIG_CMD_SETEXPR > +#define CONFIG_CMD_USB > +#define CONFIG_CMD_USB_MASS_STORAGE > + > +#define CONFIG_REGEX /* Enable regular expression support */ > + > +/* Memory configurations */ > +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ > + > +/* Booting Linux */ > +#define CONFIG_BOOTDELAY 3 > +#define CONFIG_BOOTFILE "zImage" > +#define CONFIG_BOOTARGS "console=ttyS0," > __stringify(CONFIG_BAUDRATE) > +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET > +#define CONFIG_BOOTCOMMAND "run ramboot" > +#else > +#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" > +#endif > +#define CONFIG_LOADADDR 0x8000 > +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR > + > +/* Ethernet on SoC (EMAC) */ > +#if defined(CONFIG_CMD_NET) > +#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS > +#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII > + > +/* PHY */ > +#define CONFIG_PHY_MICREL > +#define CONFIG_PHY_MICREL_KSZ9021 > +#define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" > +#define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0 > +#define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew" > +#define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0 > + > +#endif > + > +/* USB */ > +#ifdef CONFIG_CMD_USB > +#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS > +#endif > +#define CONFIG_G_DNL_MANUFACTURER "Altera" > + > +/* Extra Environment */ > +#define CONFIG_HOSTNAME socfpga_arria5 > + > +#define CONFIG_EXTRA_ENV_SETTINGS \ > + "verify=n\0" \ > + "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ > + "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ > + "bootm ${loadaddr} - ${fdt_addr}\0" \ > + "bootimage=zImage\0" \ > + "fdt_addr=100\0" \ > + "fdtimage=socfpga.dtb\0" \ > + "fsloadcmd=ext2load\0" \ > + "bootm ${loadaddr} - ${fdt_addr}\0" \ > + "mmcroot=/dev/mmcblk0p2\0" \ > + "mmcboot=setenv bootargs " CONFIG_BOOTARGS \ > + " root=${mmcroot} rw rootwait;" \ > + "bootz ${loadaddr} - ${fdt_addr}\0" \ > + "mmcload=mmc rescan;" \ > + "load mmc 0:1 ${loadaddr} ${bootimage};" \ > + "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ > + "qspiroot=/dev/mtdblock0\0" \ > + "qspirootfstype=jffs2\0" \ > + "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ > + " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ > + "bootm ${loadaddr} - ${fdt_addr}\0" > + > +/* The rest of the configuration is shared */ > +#include <configs/socfpga_common.h> > + > +#endif /* __CONFIG_SOCFPGA_ARRIA5_H__ */ -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot