Enable hardware exception by default to be able to
handle it.

Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---

 arch/microblaze/cpu/start.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 1757bbfa94b9..f46603142d85 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -130,7 +130,7 @@ flush:      bralid r15, flush_cache

        /* enable instruction and data cache */
        mfs     r12, rmsr
-       ori     r12, r12, 0xa0
+       ori     r12, r12, 0x1a0
        mts     rmsr, r12

 clear_bss:
--
1.8.2.3

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