This patch adds "iRAM, CPU state and low power" configs which are the addresses acting as flag registers.
iROM code checks CONFIG_LOWPOWER_FLAG address. If it is equal to CONFIG_LOWPOWER_EN then it jumps to the address (0x02020000+CPUID*4). This is a part of iROM logic. Rest other flags are being used at various places during kernel switching and reset. They are nowhere documented because they are part programming. These configs are serving as flags for us because they are representing the addresses in iRAM which we are using for storing and extracting CPU Status and GIC status. Signed-off-by: Akshay Saraswat <aksha...@samsung.com> --- include/configs/exynos5-common.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index ad63f3c..831bfd3 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -231,4 +231,32 @@ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV +/* iRAM */ +#define CONFIG_PHY_IRAM_BASE 0x02020000 +#define CONFIG_SEC_IRAM_SIZE 0x53000 /* 332KB */ + +#define CONFIG_EXYNOS_RELOCATE_CODE_BASE (CONFIG_PHY_IRAM_BASE \ + + CONFIG_SEC_IRAM_SIZE) + +/* + * Low Power settings + */ +#define CONFIG_LOWPOWER_FLAG 0x02020028 +#define CONFIG_LOWPOWER_ADDR 0x0202002C +#define CONFIG_LOWPOWER_EN 0xc9cfcfcf + +/* + * CPU State Settings + */ +#define CONFIG_CPU_STATE (CONFIG_EXYNOS_RELOCATE_CODE_BASE + 0x28) +#define CONFIG_GIC_STATE (CONFIG_EXYNOS_RELOCATE_CODE_BASE + 0x38) + +#define CONFIG_CPU0_STATE (CONFIG_CPU_STATE + 0x0) +#define CONFIG_CPU1_STATE (CONFIG_CPU_STATE + 0x4) +#define CONFIG_CPU2_STATE (CONFIG_CPU_STATE + 0x8) +#define CONFIG_CPU3_STATE (CONFIG_CPU_STATE + 0xC) + +#define RESET (1 << 0) +#define SECONDARY_RESET (1 << 1) + #endif /* __CONFIG_EXYNOS5_COMMON_H */ -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot