On Wed, Jun 24, 2009 at 3:09 AM, Prafulla Wadaskar<prafu...@marvell.com> wrote: >> I don't see anything in the 88E6161 switch itself that would >> respond at those 0xEE addresses (IIRC the MII bus only >> provides for 5 bits of register and phy address). Is this >> something specific to the board/SoC you were running the >> switch with and/or it's miiphy_read implementation? >> >> As far as I can tell, what is needed is to set mii_dev_addr >> to the address set by the ADDR[4:0] chip config pins, which >> would see to be a board specific item, and shouldn't be in >> the generic driver. This would seem like a good candidate >> for something that is passed in via the mv88e61xx_config structure. > > This command is mapped to the smi_reg_read function of SoCs eth controller > driver (kirkwood-egiga.c). > The 0xEE in this command is used to flag the above function to read-n-return > phy device address which is needed by switch for multi chip addressing. > Phy device address is decided by board hardware and same need to be > programmed for eth controller and switch for successful read/write. > In the current implementation phy address is provided to eth controller > driver from board config header. > During switch init which comes next, switch gets it from associated > controller though this interface > > As you suggested, we can simply provide this through mv88e61xx_config > structure, but it may lead to configuration problems, providing same settings > at two different places, if there is mismatch one need to spend enough time > debugging the same (as I spend). > > To avoid this I have implemented above method. > We do not have exposed api for the same in miiphy.h, this need to be > supported in miiphyutil > My next efforts will be expose miiphy_devadr_read/write api for the same.
I would suggest until this API is in place, it would make more sense to have the structure carry the address value and have the board startup code initialize the structure member by calling the SoC functions. This would keep the in-tree switch driver from being quite so specific to your board and SoC and get rid of the 'overloading' of the miiphy_read() function. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot