On Tue, 2015-02-10 at 13:38 +0300, Alexey Brodkin wrote: > ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary > incompatible with ISAv1 (AKA ARCompact). > > Significant difference between ISAv2 and v1 is implementation of > interrupt vector table. > > In v1 it is implemented in the same way as on many other architectures - > as a special location where user may put whether code executed in place > (if machine word of space is enough) or jump to a full-scale interrupt > handler. > > In v2 interrupt table is just an array of adresses of real interrupt > handlers. That requires a separate section for IVT that is not encoded > as code by assembler. > > This change adds support for following cores: > * ARC EM6 (simple 32-bit microcontroller without MMU) > * ARC HS36 (advanced 32-bit microcontroller without MMU) > * ARC HS38 (advanced 32-bit microcontroller with MMU) > > As a part of ARC HS38 new version of MMU (v4) was introduced. > > Also this change adds AXS131 board which is the same DW ARC SDP base board but > with ARC HS38 CPU tile. > > Signed-off-by: Alexey Brodkin <abrod...@synopsys.com> > --- > arch/arc/Kconfig | 59 ﯯ뻻 > arch/arc/config.mk | 12 寧���珷⦻狽뼱ꤞ縩廯귈罪뜿犛뽪뜯
Applied -Alexey _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot