Stefan, York,
I working on it,
Before submit I tested this patch with our custom boards those
have versions with i.MX6S and i.MX6Q CPUs installed.
I did not observe regressions on them (over 30 samples).
I suppose this is not a Freescale issue but I can't figure out
which e.MMC part is installed on TQMa6S.
Is there an open schematics for that module ?
Of course if this patch introduces regression I strongly recommend
to revert it.
Give me a time, I'll try to figure out what's going on here.
Thank you,
Volodymyr.
On Fri, Mar 6, 2015 at 11:08 AM, York Sun <york...@freescale.com> wrote:
>
> Volodymyr,
>
> On 03/06/2015 05:43 AM, Stefan Roese wrote:
> > On 25.02.2015 22:37, York Sun wrote:
> >> On 01/20/2015 07:16 AM, Volodymyr Riazantsev wrote:
> >>> Add support of the DDR mode for eSDHC driver.
> >>> Enable it for i.MX6 SoC family only.
> >>>
> >>> Change-Id: Ie27a945c9fe79d044cc886e269b60747f1744116
> >>> Signed-off-by: Volodymyr Riazantsev <volodymyr.riazant...@globallogic.com>
> >>> ---
> >>
> >> Applied to u-boot-fsl-qoriq master branch, awaiting upstream.
> >
> > This patch breaks eMMC on my TQMa6S (i.MX6SOLO). With it I get this
> > error upon U-Boot update:
> >
> > MMC write: dev # 0, block # 2, count 711 ... mmc write failed
> >
> > With this patch reverted it looks just fine:
> >
> > MMC write: dev # 0, block # 2, count 711 ... 711 blocks written: OK
> >
> > Any ideas what might cause this breakage? If this issue can't be solved
> > soon I suggest to revert this patch for this release.
>
> Please look into this issue and post a patch to fix if applicable. Thanks.
>
> York
>
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