On Tue, Mar 10, 2015 at 3:08 AM,  <feng...@phytium.com.cn> wrote:

> From: David Feng <feng...@phytium.com.cn>
>
> CPU_RELEASE_ADDR should be defined when CONFIG_ARMV8_MULTIENTRY is used.
>
> Signed-off-by: David Feng <feng...@phytium.com.cn>

As asked earlier: how can I test this with FVP or the base model?

I'm very interested in doing this as I guess it involves starting U-Boot
at EL3 on bare metal and I really want to try this.

> +/* SMP Spin Table Definitions */
> +#ifdef CONFIG_BASE_FVP
> +#define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
> +#else
> +#define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
> +#endif

Where are these address defines coming from?

Do these spin tables exist in a standard ARM FVP or base model?

I get the impression that a secondary operating system is being booted
on the secondary CPU at one of these addresses, but why is it running
at these addresses specifically, and is that something coming with these
simulators, or is it some image that is loaded on the side, that the
community does not have access to?

Yours,
Linus Walleij
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