Dear Masahiro,

Your help has enabled me to make my board Makefile do what I want (except for the clean target, see below).

On 03/12/2015 09:20 PM, Masahiro Yamada wrote:
Hi James,

2015-03-13 3:35 GMT+09:00 James Chargin <jimccr...@gmail.com>:
I could still use some help with this from someone who really knows how the
make system works.

Tom and Simon provided hints that were helpful, as I note below.


On 03/09/2015 08:34 AM, James Chargin wrote:

So, is no one willing to offer a hint?

Thanks,
Jim

On 03/03/2015 01:39 PM, James Chargin wrote:

I have a custom board in a git workspace for U-Boot 2014.07. I've copied
most of this from the .../board/ti/beagle. My board directory Makefile
looks like

8<---
obj-y := board.o
8<---

I'd like to add a few files to this directory that are processed during
"make all" and have any newly derived files deleted during "make clean".

...
Is there any documentation you could point me at that might explain the way
these Makefiles interact?

As Simon suggested, Documentation/kbuild/makefiles.txt of Linux Kernel
is the best one.

This document has been very helpful. Thank you both for pointing it out.

I know most of this was derived from somewhere
else (Linux kernel?) as part of the move to KConfig. But I have no ...

To be precise, you should say Kbuild, not Kconfig.
Kbuild and Kconfig should be considered separately.

  Kbuild - build system
  Kconfig - configuration system

They both originate in Linux Kernel.

U-Boot switched to Kbuild at 2014.04-rc1, and to Kconfig at 2014.10-rc1.

You mentioned you are using u-boot v2014.07.
So, you are building U-Boot with Kbuild,
but using the old, conventional configuration system (mkconfig + boards.cfg).

Your questions in this thread are all about Kbuild.

I appreciate your clear explanation here.

I have watched the Kbuild and KConfig conversion threads in the mailing list for some time. But having been previously working with U-Boot 2010.12, this is my first experience with either. It will be useful to know they are separate in this way.

Remaining problems:

1) I can't figure out how to clean my newly created derived .img file. I've
tried each of the following four lines (one at a time), but none worked
CLEAN_FILES += test.img
CLEAN_FILES := test.img

CLEAN_FILES is only available at the top-level Makefile.

Add
CLEAN_FILES += board/my_board/test.img
to the top-level Makefile, and it should work.


clean-files += test.img
clean-files := test.img

These are correct in sub-directory Makefiles in general,
but unfortunately, "make clean" does not descend into board/ directory
for some reason.

So, they do not work in board/*/Makefile

Should this be considered a bug in the build system? Should make descend into the board directory? Or, at least, should there not be a way for a board directory to indicate which of any locally generated derived objects should be cleaned up?

I hesitate to add to the top level Makefile for my specific board.

2) More generally, I'd like to be able to add some arbitrary make steps that
are peculiar to my boards Makefile, but I can't figure this out either, so
far.

I've tried adding my_all to extra-y and then adding steps for my_all,
similar to the following.

8<---
extra-y := test.img my_all

.PHONY my_all
my_all : test1.txt
         # some arbitrary commands to be executed if test1.txt isn't present
         cp -f test.txt test1.txt
8<---

In this case, make reports an error

make[1]: *** No rule to make target `board/my_board/my_all', needed by
`__build'.  Stop.
make: *** [board/my_board] Error 2

Any help would be appreciated.



If you want to generate board/my_board/test1.txt from board/my_board/test.txt,
the board/my_board/Makefile should look like this:

8<----

extra-y := test1.txt

$(obj)/test1.txt: $(src)/test.txt
          cp -f $< $@
8<----

This is actually the fix for many of my problems. Prepending $(obj) and $(src) apparently allows make to see the file dependencies as I intend.

...
Add the following to the top-level Makefile
8<----
CLEAN_FILES += board/my_board/test1.txt
8<----


Again, I hesitate to add to the top level Makefile.

I do not think you need to use PHONY target, but
if you really want use it, you can do like this.

8<----

__build: my_all

PHONY += my_all

my_all:
         echo "Hello, World"
8<----

As you suggest, I did not use .PHONY.

This explanation might be a nice addition to the Kbuild makefile.txt.


Again, thank you very much for your attention.

Jim
--
Jim Chargin
AJA Video Systems                       j...@aja.com
(530) 271-3334                          http://www.aja.com
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