On Wed, 2015-03-25 at 12:58 -0400, Tom Rini wrote: > On Wed, Mar 25, 2015 at 09:32:45AM +0100, Sjoerd Simons wrote: > > On Wed, 2015-03-25 at 01:11 -0400, Tom Rini wrote: > > > On Mon, Mar 23, 2015 at 03:04:48PM -0600, Simon Glass wrote: > > > > Hi Sjoerd, > > > > > > > > On 12 March 2015 at 15:33, Sjoerd Simons > > > > <sjoerd.sim...@collabora.co.uk> wrote: > > > > > The peach boards have their SDRAM start address at 0x20000000 instead > > > > > of > > > > > 0x40000000 which seems common for all other exynos5 based boards. This > > > > > means the layout set in exynos5-common.h causes the kernel be loaded > > > > > more then 128MB (at 0x42000000) away from memory start which breaks > > > > > booting kernels with CONFIG_AUTO_ZRELADDR > > > > > > > > > > Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which > > > > > uses > > > > > the same offsets from start of memory as the common exynos5 settings. > > > > > > > > > > This fixes booting via bootz and PXE > > > > > > > > > > Signed-off-by: Sjoerd Simons <sjoerd.sim...@collabora.co.uk> > > > > > --- > > > > > include/configs/peach-pi.h | 8 ++++++++ > > > > > include/configs/peach-pit.h | 8 ++++++++ > > > > > 2 files changed, 16 insertions(+) > > > > > > > > > > diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h > > > > > index f04f061..e3cb09e 100644 > > > > > --- a/include/configs/peach-pi.h > > > > > +++ b/include/configs/peach-pi.h > > > > > @@ -16,6 +16,14 @@ > > > > > #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) > > > > > #define CONFIG_SPI_BOOTING > > > > > > > > > > +#define MEM_LAYOUT_ENV_SETTINGS \ > > > > > + "bootm_size=0x10000000\0" \ > > > > > + "kernel_addr_r=0x22000000\0" \ > > > > > + "fdt_addr_r=0x23000000\0" \ > > > > > + "ramdisk_addr_r=0x23300000\0" \ > > > > > + "scriptaddr=0x30000000\0" \ > > > > > + "pxefile_addr_r=0x31000000\0" > > > > > + > > > > > #include <configs/exynos5420-common.h> > > > > > #include <configs/exynos5-dt-common.h> > > > > > > > > > > diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h > > > > > index b5efbdc..3ee42ef 100644 > > > > > --- a/include/configs/peach-pit.h > > > > > +++ b/include/configs/peach-pit.h > > > > > @@ -16,6 +16,14 @@ > > > > > #define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE) > > > > > #define CONFIG_SPI_BOOTING > > > > > > > > > > +#define MEM_LAYOUT_ENV_SETTINGS \ > > > > > + "bootm_size=0x10000000\0" \ > > > > > + "kernel_addr_r=0x22000000\0" \ > > > > > + "fdt_addr_r=0x23000000\0" \ > > > > > + "ramdisk_addr_r=0x23300000\0" \ > > > > > + "scriptaddr=0x30000000\0" \ > > > > > + "pxefile_addr_r=0x31000000\0" > > > > > + > > > > > #include <configs/exynos5420-common.h> > > > > > #include <configs/exynos5-dt-common.h> > > > > > > > > It would be great if we could have this in the device tree. > > > > > > I understand what you're thinking but this is environment. And really > > > this is not board specific, this is SoC family specific which is why the > > > similar part for TI stuff is in ti_armv7_common.h :) > > > > Exynos 5 has the same in exynos5-common.h, however for whatever reason > > the peach pi/pit boards are different then other exynos board supported > > by u-boot thusfar. So in this case, this information _is_ board specific > > not platform specific. > > Oh I missed that early on, sorry. But... > > Why not change things around a bit to enable CONFIG_CMD_SETEXPR and then > have MEM_LAYOUT_ENV_SETTINGS just set the exynos5_ddr_base and then > setexpr kernel_addr_r $exynos5_ddr_base + 0x2000000 > and similar in the generic part.
Partially because i didn't know the setexpr command and partially because i wanted a minimally disruptive patch that can hopefully still make it for 2015.4. I think doing the above would also require tweaking the distro_boot_cmd code to integrate it nicely. > > But even in case of including it in device tree, a default/common > > setting could go into the platforms dtsi with board-specific overrides > > as needed. > > > > One thing i have wondered though, looking at the various boards > > specifying the various memory layour addresses. They all end up being > > relatively similar offset to the base memory address, which makes me > > think it may be possible to calculate these values in the initialisation > > code rather then having to hardcode it in the environment. However, even > > if that's a sensible thing, something for later :) > > ... Yes, we should then take what I just did above and make it even > further wide-spread among boards where we have more than ~512MB DDR or > so :) Sounds like a plan. -- Sjoerd Simons <sjoerd.sim...@collabora.co.uk> Collabora Ltd. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot