On 19 March 2015 at 11:06, Guillaume Gardet <guillaume.gar...@free.fr> wrote: > Ping. > > Guillaume > > > Le 11/03/2015 10:34, Guillaume GARDET a écrit : > >> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup >> soc_get_periph_rate' introduced a bug in I2C config. This patch makes >> cros_ec >> keyboard working again on Samsung Chromebook (snow). >> >> Changes in V2: reorder lines as requested by Joonyoung Shim. >> >> Signed-off-by: Guillaume GARDET <guillaume.gar...@free.fr> >> Cc: Akshay Saraswat <aksha...@samsung.com> >> Cc: Minkyu Kang <mk7.k...@samsung.com> >> Cc: Joonyoung Shim <jy0922.s...@samsung.com> >> >> --- >> arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c >> b/arch/arm/cpu/armv7/exynos/clock.c >> index c6455c2..2984867 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int >> peripheral) >> case PERIPH_ID_I2C6: >> case PERIPH_ID_I2C7: >> src = EXYNOS_SRC_MPLL; >> - div = readl(&clk->div_top0); >> - sub_div = readl(&clk->div_top1); >> + div = readl(&clk->div_top1); >> + sub_div = readl(&clk->div_top0); >> break; >> default: >> debug("%s: invalid peripheral %d", __func__, peripheral);
Tested on snow. Reviewed-by: Simon Glass <s...@chroimum.org> Tested-by: Simon Glass <s...@chroimum.org> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot