Hi,
On 30-03-15 09:52, Iain Paton wrote:
On 29/03/15 13:39, Hans de Goede wrote:
Hi,
On 28-03-15 11:25, Iain Paton wrote:
clock_set_pll1 would pick the next highest available cpu clock speed if
a value not in the pre defined table was selected. this potentially
results in overclocking the soc.
reverse the selection method so that we select the next lowest speed
and add the missing 912Mhz setting that's requested by sun7i which also
uses the sun4i clock code.
Signed-off-by: Iain Paton <ipat...@gmail.com>
Thanks for the new set.
I've found one small issue with the second patch:
"sunxi: use CONFIG_SYS_CLK_FREQ to set cpu clock"
sun7i.h contained the following:
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
Which is a conflicting usage of CONFIG_SYS_CLK_FREQ compared to the new
usage introduced by your patch. I've fixed this by changing the above
to:
#define CONFIG_TIMER_CLK_FREQ 24000000
And run some compile and runtime tests.
Everything builds and works fine with this change added, so I've pushed
these 3 commits + one other fix to: u-boot-sunxi/master
Apologies for missing that. Thanks for the fixup.
Did you see any compile or runtime errors?
I definately did build and boot the result several times before sending it,
especially to verify the behaviour of the first patch.
So I'm curious as to how I missed it and you found the issue.
The problem caused compile time warnings when building for a sun7i (A20)
board, and likely would have also caused runtime problems, but I did not
test a build with the problem.
Regards,
Hans
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
