This could happen if we are being chainloaded by Coreboot with LPAE
enabled, as is the case on the Tegra-based Chromebooks.
Signed-off-by: Tomeu Vizoso <tomeu.viz...@collabora.com>
---
arch/arm/lib/cache-cp15.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 0291afa..78fb429 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -96,6 +96,10 @@ static inline void mmu_setup(void)
dram_bank_mmu_setup(i);
}
+ /* Make sure EAE is not enabled */
+ asm volatile("mcr p15, 0, %0, c2, c0, 2"
+ : : "r" (0) : "memory");
+
/* Copy the page table address to cp15 */
asm volatile("mcr p15, 0, %0, c2, c0, 0"
: : "r" (gd->arch.tlb_addr) : "memory");
--
2.3.6
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