On 2015-05-13 09:21, Wang Dongsheng wrote:
> 
> 
>> -----Original Message-----
>> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Jan Kiszka
>> Sent: Tuesday, April 21, 2015 1:19 PM
>> To: U-Boot Mailing List; Tom Rini
>> Cc: Marc Zyngier; Tom Warren; Paul Walmsley; Ian Campbell; Thierry Reding
>> Subject: [U-Boot] [PATCH v7 07/17] ARM: Put target PC for PSCI CPU_ON on 
>> per-CPU
>> stack
>>
>> Use a per-CPU variable for saving the target PC during CPU_ON operations. 
>> This
>> allows us to run this service independently on targets that have more than 2
>> cores and also core-local power control.
>>
>> CC: Marc Zyngier <marc.zyng...@arm.com>
>> Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>
>> Reviewed-by: Tom Rini <tr...@konsulko.com>
>> Reviewed-by: Thierry Reding <tred...@nvidia.com>
>> Tested-by: Thierry Reding <tred...@nvidia.com>
>> Tested-by: Ian Campbell <i...@hellion.org.uk>
>> ---
>>  arch/arm/cpu/armv7/psci.S       | 11 +++++------
>>  arch/arm/cpu/armv7/sunxi/psci.S |  9 ++++++---
>>  2 files changed, 11 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index
>> 18d85c4..87c0c0b 100644
>> --- a/arch/arm/cpu/armv7/psci.S
>> +++ b/arch/arm/cpu/armv7/psci.S
>> @@ -17,6 +17,7 @@
>>
>>  #include <config.h>
>>  #include <linux/linkage.h>
>> +#include <asm/macro.h>
>>  #include <asm/psci.h>
>>
>>      .pushsection ._secure.text, "ax"
>> @@ -202,6 +203,7 @@ ENTRY(psci_get_cpu_stack_top)
>>      add     r5, r5, #0x2000                 @ Skip two pages
>>      lsr     r5, r5, #12                     @ Align to start of page
>>      lsl     r5, r5, #12
>> +    sub     r5, r5, #4                      @ reserve 1 word for target PC
>>      sub     r0, r5, r0                      @ here's our stack!
>>
>>      bx      lr
>> @@ -212,13 +214,10 @@ ENTRY(psci_cpu_entry)
>>
>>      bl      _nonsec_init
>>
>> -    adr     r0, _psci_target_pc
>> -    ldr     r0, [r0]
>> +    bl      psci_get_cpu_id                 @ CPU ID => r0
>> +    bl      psci_get_cpu_stack_top          @ stack top => r0
>> +    ldr     r0, [r0]                        @ target PC at stack top
>>      b       _do_nonsec_entry
>>  ENDPROC(psci_cpu_entry)
>>
>> -.globl _psci_target_pc
>> -_psci_target_pc:
>> -    .word   0
>> -
>>      .popsection
>> diff --git a/arch/arm/cpu/armv7/sunxi/psci.S 
>> b/arch/arm/cpu/armv7/sunxi/psci.S
>> index dd583b2..7ec0500 100644
>> --- a/arch/arm/cpu/armv7/sunxi/psci.S
>> +++ b/arch/arm/cpu/armv7/sunxi/psci.S
>> @@ -139,8 +139,11 @@ out:    mcr     p15, 0, r7, c1, c1, 0
>>      @ r2 = target PC
>>  .globl      psci_cpu_on
>>  psci_cpu_on:
>> -    ldr     r0, =_psci_target_pc
>> -    str     r2, [r0]
>> +    push    {lr}
>> +
>> +    mov     r0, r1
>> +    bl      psci_get_cpu_stack_top  @ get stack top of target CPU
>> +    str     r2, [r0]                @ store target PC at stack top
> 
> Base on target PC will be saved in stack. The cpu(r1) should be mask firstly.
> Because r1 value is 0xf0x, and it is not what we expected cpu value(0x1 or 
> ...).
> If not, the stack address is incorrect.
> 
> When I develop LS1021a PSCI code, I found this issue. So I think sunxi also 
> has this
> issue.

IIRC, sunxi has no clusters != 0 so far, but you are right conceptually.
We already mask elsewhere in that function, so the instruction should
simply be moved up here.

Jan

-- 
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
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