Only the PCI controller has access to the PCI region information. Make sure
to use the controller (rather than any attached bridges) when configuring
devices.
This corrects a failure to scan and configure devices when driver model is
enabled for PCI.
Also add a comment to explain the problem.
Signed-off-by: Simon Glass <s...@chromium.org>
---
drivers/pci/pci-uclass.c | 6 +++++-
drivers/pci/pci_common.c | 6 ++++++
include/pci.h | 10 ++++++++++
3 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index de87505..41d19cb 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -296,6 +296,7 @@ int pci_auto_config_devices(struct udevice *bus)
!ret && dev;
ret = device_find_next_child(&dev)) {
struct pci_child_platdata *pplat;
+ struct pci_controller *ctlr_hose;
pplat = dev_get_parent_platdata(dev);
unsigned int max_bus;
@@ -303,7 +304,10 @@ int pci_auto_config_devices(struct udevice *bus)
bdf = PCI_ADD_BUS(bus->seq, pplat->devfn);
debug("%s: device %s\n", __func__, dev->name);
- max_bus = pciauto_config_device(hose, bdf);
+
+ /* The root controller has the region information */
+ ctlr_hose = hose->ctlr->uclass_priv;
+ max_bus = pciauto_config_device(ctlr_hose, bdf);
sub_bus = max(sub_bus, max_bus);
}
debug("%s: done\n", __func__);
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index b9ff23f..f67c9c7 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -11,6 +11,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <errno.h>
#include <pci.h>
#include <asm/io.h>
@@ -221,6 +222,11 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller
*hose,
return phys_addr;
}
+#ifdef CONFIG_DM_PCI
+ /* The root controller has the region information */
+ hose = hose->ctlr->uclass_priv;
+#endif
+
/*
* if PCI_REGION_MEM is set we do a two pass search with preference
* on matches that don't have PCI_REGION_SYS_MEMORY set
diff --git a/include/pci.h b/include/pci.h
index 07b1e9a..3af511b 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -513,6 +513,16 @@ struct pci_controller {
int indirect_type;
+ /*
+ * TODO(s...@chromium.org): With driver model we use struct
+ * pci_controller for both the controller and any bridge devices
+ * attached to it. But there is only one region list and it is in the
+ * top-level controller.
+ *
+ * This could be changed so that struct pci_controller is only used
+ * for PCI controllers and a separate UCLASS (or perhaps
+ * UCLASS_PCI_GENERIC) is used for bridges.
+ */
struct pci_region regions[MAX_PCI_REGIONS];
int region_count;
--
2.2.0.rc0.207.ga3a616c
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