On 07/21/2015 05:28 PM, Tom Rini wrote:
On Wed, Jul 08, 2015 at 11:51:39AM -0400, Vitaly Andrianov wrote:
Keystone2 SOC physical DDR3 address range is outside the first 4GB and
cannot be entirely accessible without MMU enabled. Only first 2GB of
the physical memory have 32-bits aliased addresses. This patch adds u-boot
shell command that allows to enable/disable MMU and map the 1GB of
36bits physical memory to the first 4GB address range.
Signed-off-by: Vitaly Andrianov <vita...@ti.com>
---
arch/arm/mach-keystone/Makefile | 3 +-
arch/arm/mach-keystone/highmem.c | 162 +++++++++++++++++++++++++++++++++++++++
2 files changed, 164 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-keystone/highmem.c
The code looks reasonable. But why do we need this? Thanks.
Tom,
I added this code to test DDR3 configuration. Probably you are right.
After configuration is done we don't need this code.
Thanks,
-Vitaly
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