Since some driver like ohci, lcd used dcache functions. But some ARM
cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
functions.
To avoid compiling errors this patch adds an weak empty stub function
for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.
Signed-off-by: Josh Wu <josh...@atmel.com>
---
Changes in v3:
- remove the same functions in the cpu/ files as they will use the weak
function provided in lib/cache.c
Changes in v2:
- new added.
arch/arm/cpu/arm1136/cpu.c | 8 --------
arch/arm/cpu/arm926ejs/cache.c | 8 --------
arch/arm/cpu/armv7/cache_v7.c | 8 --------
arch/arm/cpu/armv8/cache_v8.c | 8 --------
arch/arm/lib/cache.c | 9 +++++++++
5 files changed, 9 insertions(+), 32 deletions(-)
diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c
index a7aed4b..b4d1d54 100644
--- a/arch/arm/cpu/arm1136/cpu.c
+++ b/arch/arm/cpu/arm1136/cpu.c
@@ -134,14 +134,6 @@ void flush_dcache_all(void)
{
}
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
void flush_cache(unsigned long start, unsigned long size)
{
}
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 8d7873c..99d1a13 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -83,14 +83,6 @@ void flush_dcache_all(void)
{
}
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
void flush_cache(unsigned long start, unsigned long size)
{
}
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index e8ee875..4f0e406 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -304,14 +304,6 @@ void flush_dcache_all(void)
{
}
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
void arm_init_before_mmu(void)
{
}
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index c5ec529..f8c17cc 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -149,14 +149,6 @@ void flush_dcache_all(void)
{
}
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
void dcache_enable(void)
{
}
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 74cfde6..bc48f53 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -53,6 +53,15 @@ __weak void enable_caches(void)
puts("WARNING: Caches not enabled\n");
}
+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop)
+{
+ /* An empty stub, real implementation should be in platform code */
+}
+__weak void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+ /* An empty stub, real implementation should be in platform code */
+}
+
#ifdef CONFIG_SYS_NONCACHED_MEMORY
/*
* Reserve one MMU section worth of address space below the malloc() area that
--
1.9.1
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
