Hello Scott, On 18.07.2015 03:07, Vladimir Zapolskiy wrote: > The change adds support of LPC32xx SLC NAND controller. > > LPC32xx SoC has two different mutually exclusive NAND controllers to > communicate with single and multiple layer chips. > > This simple driver allows to specify NAND chip timings and defines > custom read_buf()/write_buf() operations, because access to 8-bit data > register must be 32-bit aligned. > > Support of hardware ECC calculation is not implemented (data > correction is always done by software), since it requires a working > DMA engine. > > The driver can be included to an SPL image. > > Signed-off-by: Vladimir Zapolskiy <v...@mleia.com> > --- > Changes from v3 to v4: > * renamed "lpc32xx_nand_slc_registers" to "lpc32xx_nand_slc_regs", > * replaced non-leading tabs with spaces to get columned assignments, > * removed leftover redundant type casts, > * lpc32xx_nand_cmd_ctrl() sets address register iff (ctrl & NAND_ALE). > > Changes from v2 to v3: > * no changes, sent a non-rebased version by mistake. > > Changes from v1 to v2: > * addressed Albert's and Scott's comments to LPC32xx SLC NAND driver: > - removed unnecessary uint32_t casts in write_buf()/write_byte(), > - removed IO_ADDR_[RW] assignment, this is done in nand.c for SPL > and generally not needed for custom defined PIO interfaces in > U-boot (with exception of simple NAND SPL, addressed by 1/4), > - removed leftover declarations of HW ECC related bit fields, > this should be added along with HW ECC support, > - improved description of a reason why software ECC is selected, > if DMA is unavailable (explicit reference to User Manual from NXP). > > Previous review can be found here: > v3: > http://lists.denx.de/pipermail/u-boot/2015-July/219431.html > > v2: > http://lists.denx.de/pipermail/u-boot/2015-July/219422.html > > v1: > http://lists.denx.de/pipermail/u-boot/2015-July/219095.html > http://lists.denx.de/pipermail/u-boot/2015-July/219254.html > > arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 6 + > arch/arm/include/asm/arch-lpc32xx/clk.h | 2 + > arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 + > drivers/mtd/nand/Makefile | 1 + > drivers/mtd/nand/lpc32xx_nand_slc.c | 176 > ++++++++++++++++++++++++++ > 5 files changed, 186 insertions(+) > create mode 100644 drivers/mtd/nand/lpc32xx_nand_slc.c >
please let me know, if this change is ready for inclusion to the next U-boot release. The following changes from the series to a board file (NAND and SPL build) depend on this one, if this SLC NAND change is accepted I hope Albert may find time to include board specific changes as well. Thank you in advance. -- With best wishes, Vladimir _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot