Hi Stefano,

On Sun, Aug 2, 2015 at 6:40 AM, Stefano Babic <sba...@denx.de> wrote:

> I have a main question. For i.MX6, we could factorize (mainly thanks
> Tim's work) the major SOC variants, getting some important goals, as
> having a single u-boot image running on different variations of the same
> board.
>
> This was reached deciding at run time which is the pin, its register and
> the value to be written - instead of fixing at build time.
>
> Exceptions are the SOC that cannot be substitute by another one on the
> same board, because they are not pin compatible: for example, MX&SX.
>
> Now you are introducing the new architecture for MX7, but it looks like
> you get rid of these improvements. It can be right or false, then my
> questions:
>
> - has MX7 quite the same variations as MX6 ? I mean a qaud, dual and
> solo that are pin-to-pin compatible ?

No, mx7 is not pin compatible with the mx6 family.

Regards,

Fabio Estevam
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