This code may be useful for boards that use driver model for PCI.
Note: It would be better to have driver model automatically call this
function somehow. However for now it is probably safer to have it under
board control.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v2: None
arch/x86/include/asm/fsp/fsp_support.h | 7 +++++++
arch/x86/lib/fsp/fsp_common.c | 11 ++++++++---
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/fsp/fsp_support.h
b/arch/x86/include/asm/fsp/fsp_support.h
index c6c7dc0..7317dda 100644
--- a/arch/x86/include/asm/fsp/fsp_support.h
+++ b/arch/x86/include/asm/fsp/fsp_support.h
@@ -207,4 +207,11 @@ void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32
*len);
*/
void update_fsp_upd(struct upd_region *fsp_upd);
+/**
+ * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init
+ *
+ * @return 0 if OK, -EPERM if the FSP gave an error.
+ */
+int fsp_init_phase_pci(void);
+
#endif
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index c585710..6f72c6d 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -19,19 +19,24 @@ int print_cpuinfo(void)
return default_print_cpuinfo();
}
-int board_pci_post_scan(struct pci_controller *hose)
+int fsp_init_phase_pci(void)
{
u32 status;
/* call into FspNotify */
debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
status = fsp_notify(NULL, INIT_PHASE_PCI);
- if (status != FSP_SUCCESS)
+ if (status)
debug("fail, error code %x\n", status);
else
debug("OK\n");
- return 0;
+ return status ? -EPERM : 0;
+}
+
+int board_pci_post_scan(struct pci_controller *hose)
+{
+ return fsp_init_phase_pci();
}
void board_final_cleanup(void)
--
2.5.0.rc2.392.g76e840b
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