As a preparatory step make sure the display driver is buildable for
Tegra30 as well by ifdef gating any hard-coded ugly Tegra20 pin muxing
stuff.
Signed-off-by: Marcel Ziswiler <marcel.ziswi...@toradex.com>
---
drivers/video/tegra.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index 33c6103..3946e6e 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -215,8 +215,10 @@ static int handle_stage(const void *blob)
break;
case STAGE_PWM:
/* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
+#ifdef CONFIG_MACH_T20
pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
pinmux_tristate_disable(PMUX_PINGRP_GPU);
+#endif
pwm_enable(config.pwm_channel, 32768, 0xdf, 1);
break;
--
2.4.3
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