On Saturday, October 10, 2015 at 07:55:45 AM, Thomas Chou wrote: > Hi Marek,
Hi, > On 10/09/2015 10:42 PM, Marek Vasut wrote: > >> In nios2, we don't skip the flushing when the inputs are not aligned > >> like that of arm926ejs. We always flush all cache lines in the range, > >> even if a single byte to flush is in request. So the inputs are rounded > >> to get the lower and upper cache lines range inside the cache flush > >> functions. The caller need not be aware of the detail. > > > > This is incorrect and all the places which produce these unaligned cache > > operations must be fixed. > > I take a look into the cache flush operations in every arch of u-boot. > It turns out that the arm926ejs is the only platform that does such > cache line range check and skip. All other ARM and all other arch don't. Yes, everyone else doesn't do the checks and if there is unaligned cache flush/invalidation, that platform also suffers from various obscure and hard to debug errors. I submitted patch to add the same check for ARMv7, but it didn't receive attention :-( I should repost it I guess. > And the cache flush in Linux don't. Because the buffers there are always correctly aligned during allocation. Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot