On Monday, October 12, 2015 at 07:29:43 AM, Thomas Chou wrote:
> Convert dma_alloc_coherent to use memalign.
>
> Signed-off-by: Thomas Chou <tho...@wytron.com.tw>
> ---
> v2
> use memalign.
> v3
> check memalign() return for out of memory.
> v4
> use malloc_cache_aligned().
>
> arch/nios2/include/asm/dma-mapping.h | 24 +++++++++++-------------
> 1 file changed, 11 insertions(+), 13 deletions(-)
>
> diff --git a/arch/nios2/include/asm/dma-mapping.h
> b/arch/nios2/include/asm/dma-mapping.h index 1350e3b..bfaf662 100644
> --- a/arch/nios2/include/asm/dma-mapping.h
> +++ b/arch/nios2/include/asm/dma-mapping.h
> @@ -1,23 +1,21 @@
> #ifndef __ASM_NIOS2_DMA_MAPPING_H
> #define __ASM_NIOS2_DMA_MAPPING_H
>
> -/* dma_alloc_coherent() return cache-line aligned allocation which is
> mapped +#include <memalign.h>
> +#include <asm/io.h>
> +
> +/*
> + * dma_alloc_coherent() return cache-line aligned allocation which is
> mapped * to uncached io region.
> - *
> - * IO_REGION_BASE should be defined in board config header file
> - * 0x80000000 for nommu, 0xe0000000 for mmu
> */
> -
> static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
> {
> - void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
> - if (!addr)
> - return 0;
> - flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
> - *handle = ((unsigned long)addr +
> - (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
> - ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
> - return (void *)(*handle | IO_REGION_BASE);
> + *handle = (unsigned long)malloc_cache_aligned(len);
> + if (!*handle)
> + return NULL;
> + flush_dcache_range(*handle, *handle + len);
Wouldn't invalidate_dcache_range() be enough here ? You don't care about the
data in the newly allocated area at this point I guess -- either you fill them
in and then flush, for DMA from CPU to device OR you receive data from device
to CPU and then you invalidate this buffer again.
> + return ioremap(*handle, len);
> }
>
> #endif /* __ASM_NIOS2_DMA_MAPPING_H */
Best regards,
Marek Vasut
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