Hi Gregory,
On 05.11.15 20:58, Gregory CLEMENT wrote:
> Timing issue occurs on eMMC not only when modifying the frequency but
> also for all the switch command(CMD6). According to the MMC spec waiting
> 8 clocks after a switch command would be the thing to do.
>
> This patch allows fixing CPU hang observed when trying to changing the
> bus width on a eMMC on SAMA5D4.
>
> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> Tested-by: Marek Vasut <ma...@denx.de> # on DENX MA5D4EV
this patch seams to break avr32 ... I'm on it to investigate the root cause.
Andreas
> ---
> drivers/mmc/gen_atmel_mci.c | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
> index da870c6..f090b27 100644
> --- a/drivers/mmc/gen_atmel_mci.c
> +++ b/drivers/mmc/gen_atmel_mci.c
> @@ -36,6 +36,7 @@ struct atmel_mci_priv {
> struct mmc_config cfg;
> struct atmel_mci *mci;
> unsigned int initialized:1;
> + unsigned int curr_clk;
> };
>
> /* Read Atmel MCI IP version */
> @@ -91,7 +92,10 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32
> blklen)
>
> }
> }
> -
> + if (version >= 0x500)
> + priv->curr_clk = bus_hz / (clkdiv * 2 + clkodd + 2);
> + else
> + priv->curr_clk = (bus_hz / (clkdiv + 1)) / 2;
> blklen &= 0xfffc;
>
> mr = MMCI_BF(CLKDIV, clkdiv);
> @@ -118,8 +122,6 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32
> blklen)
> if (mmc->card_caps & mmc->cfg->host_caps & MMC_MODE_HS)
> writel(MMCI_BIT(HSMODE), &mci->cfg);
>
> - udelay(50);
> -
> priv->initialized = 1;
> }
>
> @@ -323,6 +325,13 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
> struct mmc_data *data)
> }
> }
>
> + /*
> + * After the switch command, wait for 8 clocks before the next
> + * command
> + */
> + if (cmd->cmdidx == MMC_CMD_SWITCH)
> + udelay(8*1000000/ priv->curr_clk); /* 8 clk in us */
> +
> return 0;
> }
>
>
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