On Wednesday, December 02, 2015 at 08:31:33 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen <dingu...@opensource.altera.com>
>
> Move the macro into the socfpga_dwmci_clksel().
>
> Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com>
> ---
> v2: add SYSMGR_SDMMC_DRVSEL_SHIFT
> s/SYSMGR_SDMMC_SMPSEL_SHIFT/SYSMGR_SDMMC_SMPLSEL_SHIFT
> ---
> arch/arm/mach-socfpga/include/mach/system_manager.h | 10 +++++++---
> drivers/mmc/socfpga_dw_mmc.c | 5 +++--
> 2 files changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h
> b/arch/arm/mach-socfpga/include/mach/system_manager.h index
> f8d9e98..e688c50 100644
> --- a/arch/arm/mach-socfpga/include/mach/system_manager.h
> +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
> @@ -201,9 +201,13 @@ struct socfpga_system_manager {
> #define SYSMGR_FPGAINTF_NAND (1 << 4)
> #define SYSMGR_FPGAINTF_SDMMC (1 << 5)
>
> -/* FIXME: This is questionable macro. */
> -#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
> - ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38))
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 3
> +#else
> +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 4
> +#endif
> +
> +#define SYSMGR_SDMMC_DRVSEL_SHIFT 0
>
> /* EMAC Group Bit definitions */
> #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0
> diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
> index 5b0c3a8..d7edec7 100644
> --- a/drivers/mmc/socfpga_dw_mmc.c
> +++ b/drivers/mmc/socfpga_dw_mmc.c
> @@ -33,6 +33,8 @@ struct dwmci_socfpga_priv_data {
> static void socfpga_dwmci_clksel(struct dwmci_host *host)
> {
> struct dwmci_socfpga_priv_data *priv = host->priv;
> + u32 sdmmc_mask = ((((priv->smplsel) & 0x7) <<
SYSMGR_SDMMC_SMPLSEL_SHIFT)
> | + ((priv->drvsel) & 0x7) << SYSMGR_SDMMC_DRVSEL_SHIFT);
After correcting the parenthesis mayhem here, applied.
Best regards,
Marek Vasut
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