Hi Fabio and Hector, On 12/04/2015 10:43 AM, Eric Nelson wrote: > On 12/04/2015 10:38 AM, Eric Nelson wrote: >> On 12/04/2015 10:32 AM, Eric Nelson wrote: >>> The low four bits of the SYSCTL register are reserved on the USDHC >>> controller on i.MX6 and i.MX7 processors, but are used for clocking >>> operations on earlier models. >>> >>> Guard against their usage by hiding the bit mask macros on those >>> processors. >>> >>> These bits are used to prevent glitches when changing clocks on >>> i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7. >>> >>> From the i.MX6DQ RM: >>> To prevent possible glitch on the card clock, clear the >>> FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS >>> or DVS in System Control Register) or setting RSTA bit. >>> >>> Signed-off-by: Eric Nelson <e...@nelint.com> >> >> I forgot to add an in-reply-to header. >> >> http://lists.denx.de/pipermail/u-boot/2015-December/thread.html#236651 >> >> > > Fabio, I haven't been able to reproduce the "mmc erase/ENGcm03648" > issue (with or without a code change) for a couple of hours now. > > Can you give this a spin? > > It seems unlikely to address the issue unless what we're seeing is a > side effect of a glitch while switching clocks. > >
I switched back to a v2014.10 release and am able to reproduce the issue at will. The sysctl patch had no effect, but adding an #ifndef around the ENGcm03648 block allows things to proceed. +#ifndef CONFIG_FSL_USDHC /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { ... Since the need to poll the DAT0 line is only documented in the errata for the i.MX35, I wonder if this isn't the right thing to do. The CC bit of irqstat does indicate that the command completed and without error (I'm seeing values of 1 in irqstat). >From what I can tell, the linux kernel doesn't do this test and doesn't appear to have any trouble. What code base are you running against (u-boot-imx/master)? What do you see if you do the same? I had been testing against v2015.10 and the board I'm testing isn't upstream, so I can't easily bisect. Please advise, Eric _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot