Hi Simon,

On Tue, Dec 8, 2015 at 11:38 AM, Simon Glass <s...@chromium.org> wrote:
> Set up a PCH init() method where we will put init code. Rename the existing
> bd82x6x_init() to bd82x6x_init_extra().
>
> Signed-off-by: Simon Glass <s...@chromium.org>
> ---
>
>  arch/x86/cpu/ivybridge/bd82x6x.c              |  8 +++++++-
>  arch/x86/cpu/ivybridge/cpu.c                  | 11 +++++++++++
>  arch/x86/cpu/ivybridge/pci.c                  |  2 +-
>  arch/x86/include/asm/arch-ivybridge/bd82x6x.h |  2 +-
>  4 files changed, 20 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c 
> b/arch/x86/cpu/ivybridge/bd82x6x.c
> index be39bcd..fce6622 100644
> --- a/arch/x86/cpu/ivybridge/bd82x6x.c
> +++ b/arch/x86/cpu/ivybridge/bd82x6x.c
> @@ -100,7 +100,7 @@ static int bd82x6x_probe(struct udevice *dev)
>         return 0;
>  }
>
> -int bd82x6x_init(void)
> +int bd82x6x_init_extra(void)
>  {
>         const void *blob = gd->fdt_blob;
>         int sata_node;
> @@ -125,7 +125,13 @@ static int bd82x6x_pch_get_version(struct udevice *dev)
>         return 9;
>  }
>
> +static int bd82x6x_init(struct udevice *dev)
> +{
> +       return 0;
> +}
> +
>  static const struct pch_ops bd82x6x_pch_ops = {
> +       .init           = bd82x6x_init,
>         .get_version    = bd82x6x_pch_get_version,
>  };
>
> diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
> index 5f4683c..c1f5ec9 100644
> --- a/arch/x86/cpu/ivybridge/cpu.c
> +++ b/arch/x86/cpu/ivybridge/cpu.c
> @@ -15,6 +15,7 @@
>  #include <dm.h>
>  #include <errno.h>
>  #include <fdtdec.h>
> +#include <pch.h>
>  #include <asm/cpu.h>
>  #include <asm/io.h>
>  #include <asm/lapic.h>
> @@ -211,6 +212,7 @@ int print_cpuinfo(void)
>  {
>         enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE;
>         char processor_name[CPU_MAX_NAME_LEN];
> +       struct udevice *dev;
>         const char *name;
>         uint32_t pm1_cnt;
>         uint16_t pm1_sts;
> @@ -241,6 +243,15 @@ int print_cpuinfo(void)
>         }
>
>         /* Early chipset init required before RAM init can work */
> +       ret = uclass_first_device(UCLASS_PCH, &dev);

Previous patch mentioned that probing LPC driver will automatically
probe its parent PCH. Is this not the case?

> +       if (ret)
> +               return ret;
> +       if (!dev)
> +               return -ENODEV;
> +       ret = pch_init(dev);
> +       if (ret)
> +               return ret;
> +
>         sandybridge_early_init(SANDYBRIDGE_MOBILE);
>
>         /* Check PM1_STS[15] to see if we are waking from Sx */
> diff --git a/arch/x86/cpu/ivybridge/pci.c b/arch/x86/cpu/ivybridge/pci.c
> index 5e90f30..8af99b4 100644
> --- a/arch/x86/cpu/ivybridge/pci.c
> +++ b/arch/x86/cpu/ivybridge/pci.c
> @@ -26,7 +26,7 @@ static int pci_ivybridge_probe(struct udevice *bus)
>         if (!(gd->flags & GD_FLG_RELOC))
>                 return 0;
>         post_code(0x50);
> -       bd82x6x_init();
> +       bd82x6x_init_extra();
>         post_code(0x51);
>
>         reg16 = 0xff;
> diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h 
> b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
> index fcdf6e2..d76cb8d 100644
> --- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
> +++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h
> @@ -13,7 +13,7 @@ void bd82x6x_pci_init(pci_dev_t dev);
>  void bd82x6x_usb_ehci_init(pci_dev_t dev);
>  void bd82x6x_usb_xhci_init(pci_dev_t dev);
>  int gma_func0_init(struct udevice *dev, const void *blob, int node);
> -int bd82x6x_init(void);
> +int bd82x6x_init_extra(void);
>
>  /**
>   * struct x86_cpu_priv - Information about a single CPU
> --

As I mentioned previously, I don't understand why we create the init
op for PCH uclass, instead we cannot put the init into PCH driver's
probe routine?

Regards,
Bin
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