Am Dienstag, den 12.01.2016, 15:48 +0530 schrieb Purna Chandra Mandal:
> From: Andrei Pistirica <andrei.pistir...@microchip.com>
>
> This driver implements platform specific glue and fixups for
> PIC32 internal SDHCI controller.
>
> Signed-off-by: Andrei Pistirica <andrei.pistir...@microchip.com>
> Signed-off-by: Sandeep Sheriker Mallikarjun <
> sandeepsheriker.mallikar...@microchip.com>
> Signed-off-by: Purna Chandra Mandal <purna.man...@microchip.com>
>
Reviewed-by: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
nits below
> ---
>
> Changes in v3:
> - remove ofdata_to_platdata, and replace platdata with priv
> - replace pic32_ioremap() with ioremap()
>
> Changes in v2:
> - drop sdhci shared bus configuration (for shared interrupt, clock
> pins)
>
> drivers/mmc/Kconfig | 6 +++++
> drivers/mmc/Makefile | 2 +-
> drivers/mmc/pic32_sdhci.c | 61
> +++++++++++++++++++++++++++++++++++++++++++++++
> drivers/mmc/sdhci.c | 12 ++++++++++
> 4 files changed, 80 insertions(+), 1 deletion(-)
> create mode 100644 drivers/mmc/pic32_sdhci.c
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index ceae7bc..0b6f54b 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -31,4 +31,10 @@ config SH_SDHI
> help
> Support for the on-chip SDHI host controller on
> SuperH/Renesas ARM SoCs platform
>
> +config PIC32_SDHCI
> + bool "Microchip PIC32 on-chip SDHCI support"
> + depends on DM_MMC && MACH_PIC32
> + help
> + Support for the on-chip SDHCI support on Microchip PIC32
> platforms.
> +
> endmenu
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 5d35705..c9c3e3e 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -48,4 +48,4 @@ obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
> else
> obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
> endif
> -
> +obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
> diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c
> new file mode 100644
> index 0000000..f8a5a23
> --- /dev/null
> +++ b/drivers/mmc/pic32_sdhci.c
> @@ -0,0 +1,61 @@
> +/*
> + * Support of SDHCI for Microchip PIC32 SoC.
> + *
> + * Copyright (C) 2015 Microchip Technology Inc.
> + * Andrei Pistirica <andrei.pistir...@microchip.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <dm.h>
> +#include <common.h>
> +#include <sdhci.h>
> +#include <asm/errno.h>
> +#include <mach/pic32.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static int pic32_sdhci_probe(struct udevice *dev)
> +{
> + struct sdhci_host *host = dev_get_priv(dev);
> + const void *fdt = gd->fdt_blob;
> + u32 f_min_max[2];
> + fdt_addr_t addr;
> + fdt_size_t size;
> + int ret;
> +
> + addr = fdtdec_get_addr_size(fdt, dev->of_offset, "reg",
> &size);
> + if (addr == FDT_ADDR_T_NONE)
> + return -EINVAL;
> +
> + host->ioaddr = ioremap(addr, size);
> + if (!host->ioaddr)
> + return -EINVAL;
this check can be dropped. ioremap() always returns a mapped address
> +
> + host->name = (char *)dev->name;
> + host->quirks = SDHCI_QUIRK_NO_HISPD_BIT;
> + host->bus_width = fdtdec_get_int(gd->fdt_blob, dev
> ->of_offset,
> + "bus-width", 4);
> +
> + ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
> + "clock-freq-min-max", f_min_max,
> 2);
> + if (ret) {
> + printf("sdhci: clock-freq-min-max not found\n");
> + return ret;
> + }
> +
> + return add_sdhci(host, f_min_max[1], f_min_max[0]);
> +}
> +
> +static const struct udevice_id pic32_sdhci_ids[] = {
> + { .compatible = "microchip,pic32mzda-sdhci" },
> + { }
> +};
> +
> +U_BOOT_DRIVER(pic32_sdhci_drv) = {
> + .name = "pic32_sdhci",
> + .id = UCLASS_MMC,
> + .of_match = pic32_sdhci_ids,
> + .probe = pic32_sdhci_probe,
> + .priv_auto_alloc_size = sizeof(struct sdhci_host),
> +};
> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> index 02d71b9..f32fe67 100644
> --- a/drivers/mmc/sdhci.c
> +++ b/drivers/mmc/sdhci.c
> @@ -424,6 +424,18 @@ static void sdhci_set_ios(struct mmc *mmc)
> if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
> ctrl &= ~SDHCI_CTRL_HISPD;
>
> +#if defined(CONFIG_PIC32_SDHCI)
> + /*
> + * In PIC32MZ[DA] due to h/w bug SDHCI fails detecting card
> when JTAG
> + * is not connected.
> + * To work-around this problem:
> + * - set Card_Detect_Signal_Selection bit in
> SDHCI_Host_Control register
> + * - clear Card_Detect_Test_Level bit in SDHCI_Host_Control
> register
> + */
> + ctrl |= SDHCI_CTRL_CD_TEST;
> + ctrl &= ~SDHCI_CTRL_CD_TEST_INS;
> +#endif
I think this could (or should?) be implemented with a new quirks bit
> +
> sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
> }
>
--
- Daniel
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