Add the required pre-relocation tags and SDRAM init information for U-Boot.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/arm/dts/rk3288-rock2-square.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/rk3288-rock2-square.dts
b/arch/arm/dts/rk3288-rock2-square.dts
index c5453a0..8d7446f 100644
--- a/arch/arm/dts/rk3288-rock2-square.dts
+++ b/arch/arm/dts/rk3288-rock2-square.dts
@@ -96,6 +96,7 @@
};
&sdmmc {
+ u-boot,dm-pre-reloc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
@@ -138,6 +139,7 @@
};
&pinctrl {
+ u-boot,dm-pre-reloc;
ir {
ir_int: ir-int {
rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -169,6 +171,8 @@
&uart2 {
status = "okay";
+ u-boot,dm-pre-reloc;
+ reg-shift = <2>;
};
&usbphy {
@@ -178,3 +182,20 @@
&usb_host0_ehci {
status = "okay";
};
+
+&dmc {
+ rockchip,num-channels = <2>;
+ rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+ 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+ 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+ 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+ 0x5 0x0>;
+ rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+ 0xa60 0x40 0x10 0x0>;
+ rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>;
+ rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&gpio7 {
+ u-boot,dm-pre-reloc;
+};
--
2.6.0.rc2.230.g3dd15c0
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