At present interrupt routing is set up from arch_misc_init(). We can do it a little later instead, in interrupt_init().
This removes the manual pirq_init() call. Where the platform does not have an interrupt router defined in its device tree, no error is generated. Some platforms do not have this. Drop pirq_init() since it is no-longer used. Signed-off-by: Simon Glass <s...@chromium.org> Reviewed-by: Bin Meng <bmeng...@gmail.com> Tested-by: Bin Meng <bmeng...@gmail.com> --- arch/x86/cpu/baytrail/valleyview.c | 2 +- arch/x86/cpu/interrupts.c | 9 +++++++++ arch/x86/cpu/irq.c | 7 ------- arch/x86/cpu/qemu/qemu.c | 5 ----- arch/x86/cpu/quark/quark.c | 2 +- arch/x86/cpu/queensbay/tnc.c | 2 +- arch/x86/include/asm/irq.h | 10 ---------- include/configs/qemu-x86.h | 1 - 8 files changed, 12 insertions(+), 26 deletions(-) diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c index 7299f2c..25382f9 100644 --- a/arch/x86/cpu/baytrail/valleyview.c +++ b/arch/x86/cpu/baytrail/valleyview.c @@ -50,7 +50,7 @@ int arch_misc_init(void) mrccache_save(); #endif - return pirq_init(); + return 0; } int reserve_arch(void) diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c index b00ddc0..c40200b 100644 --- a/arch/x86/cpu/interrupts.c +++ b/arch/x86/cpu/interrupts.c @@ -12,6 +12,7 @@ */ #include <common.h> +#include <dm.h> #include <asm/cache.h> #include <asm/control_regs.h> #include <asm/interrupt.h> @@ -244,6 +245,14 @@ int disable_interrupts(void) int interrupt_init(void) { + struct udevice *dev; + int ret; + + /* Try to set up the interrupt router, but don't require one */ + ret = uclass_first_device(UCLASS_IRQ, &dev); + if (ret && ret != -ENODEV) + return ret; + /* * When running as an EFI application we are not in control of * interrupts and should leave them alone. diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index 9b699cf..8f59b23 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -231,13 +231,6 @@ static int create_pirq_routing_table(void) return 0; } -int pirq_init(void) -{ - struct udevice *dev; - - return uclass_first_device(UCLASS_IRQ, &dev); -} - int irq_router_probe(struct udevice *dev) { int ret; diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index 46111c9..5a7b929 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -96,11 +96,6 @@ int arch_early_init_r(void) return 0; } -int arch_misc_init(void) -{ - return pirq_init(); -} - #ifdef CONFIG_GENERATE_MP_TABLE int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq) { diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 37ce394..f652d99 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -375,7 +375,7 @@ int arch_misc_init(void) mrccache_save(); #endif - return pirq_init(); + return 0; } void board_final_cleanup(void) diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index fb81919..b65906b 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -110,5 +110,5 @@ int arch_misc_init(void) { unprotect_spi_flash(); - return pirq_init(); + return 0; } diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h index 6697da3..74da66e 100644 --- a/arch/x86/include/asm/irq.h +++ b/arch/x86/include/asm/irq.h @@ -65,14 +65,4 @@ struct pirq_routing { */ void cpu_irq_init(void); -/** - * pirq_init() - Initialize platform PIRQ routing - * - * This initializes the PIRQ routing on the platform and configures all PCI - * devices' interrupt line register to a working IRQ number on the 8259 PIC. - * - * @return 0 if OK, -ve on error - */ -int pirq_init(void); - #endif /* _ARCH_IRQ_H_ */ diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 4258dcb..b0d2ffe 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -14,7 +14,6 @@ #include <configs/x86-common.h> #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_ARCH_MISC_INIT #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_PCI_PNP -- 2.6.0.rc2.230.g3dd15c0 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot