We can drop the explicit probe of the PCH since the LPC is a child device
and this will happen automatically.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v2:
- Drop explicit PCH probe
- Drop LPC init method
- Rename patch from 'Add an init() method for the bd82x6x LPC'
arch/x86/cpu/ivybridge/cpu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index f32b4a1..65eea1f 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -212,7 +212,7 @@ int print_cpuinfo(void)
{
enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE;
char processor_name[CPU_MAX_NAME_LEN];
- struct udevice *dev;
+ struct udevice *dev, *lpc;
const char *name;
uint32_t pm1_cnt;
uint16_t pm1_sts;
@@ -245,12 +245,11 @@ int print_cpuinfo(void)
/* Early chipset init required before RAM init can work */
uclass_first_device(UCLASS_NORTHBRIDGE, &dev);
- ret = uclass_first_device(UCLASS_PCH, &dev);
+ ret = uclass_first_device(UCLASS_LPC, &lpc);
if (ret)
return ret;
if (!dev)
return -ENODEV;
-
sandybridge_early_init(SANDYBRIDGE_MOBILE);
/* Check PM1_STS[15] to see if we are waking from Sx */
--
2.6.0.rc2.230.g3dd15c0
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